generalise the operator handling
ie passing them through implementing more
This commit is contained in:
parent
7d9132ee36
commit
9e21719aeb
@ -181,7 +181,10 @@ module Risc
|
|||||||
end
|
end
|
||||||
|
|
||||||
obj = space.get_class_by_name(:Integer)
|
obj = space.get_class_by_name(:Integer)
|
||||||
[ :putint, :div4, :div10, :+ , :- , :*].each do |f| #div4 is just a forward declaration
|
Risc.operators.each do |op|
|
||||||
|
obj.instance_type.add_method Builtin::Integer.operator_method(op)
|
||||||
|
end
|
||||||
|
[:putint, :div4, :div10].each do |f| #div4 is just a forward declaration
|
||||||
obj.instance_type.add_method Builtin::Integer.send(f , nil)
|
obj.instance_type.add_method Builtin::Integer.send(f , nil)
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
@ -24,24 +24,15 @@ module Risc
|
|||||||
compiler.add_mom( Mom::ReturnSequence.new)
|
compiler.add_mom( Mom::ReturnSequence.new)
|
||||||
return compiler.method
|
return compiler.method
|
||||||
end
|
end
|
||||||
def *( context )
|
def operator_method( op_sym )
|
||||||
operator_method( "mult" , :*)
|
|
||||||
end
|
|
||||||
def +( context )
|
|
||||||
operator_method( "plus" , :+)
|
|
||||||
end
|
|
||||||
def -( context )
|
|
||||||
operator_method( "minus" , :-)
|
|
||||||
end
|
|
||||||
def operator_method(op_name , op_sym )
|
|
||||||
compiler = compiler_for(:Integer, op_sym ,{other: :Integer})
|
compiler = compiler_for(:Integer, op_sym ,{other: :Integer})
|
||||||
builder = compiler.builder(true, compiler.method)
|
builder = compiler.builder(true, compiler.method)
|
||||||
me , other = builder.self_and_int_arg(op_name + "load receiver and arg")
|
me , other = builder.self_and_int_arg(op_sym.to_s + "load receiver and arg")
|
||||||
builder.reduce_int( op_name + " fix me", me )
|
builder.reduce_int( op_sym.to_s + " fix me", me )
|
||||||
builder.reduce_int( op_name + " fix arg", other )
|
builder.reduce_int( op_sym.to_s + " fix arg", other )
|
||||||
builder.add_code Risc.op( op_name + " operator", op_sym , me , other)
|
builder.add_code Risc.op( op_sym.to_s + " operator", op_sym , me , other)
|
||||||
builder.add_new_int(op_name + " new int", me , other)
|
builder.add_new_int(op_sym.to_s + " new int", me , other)
|
||||||
builder.add_reg_to_slot( op_name + "save ret" , other , :message , :return_value)
|
builder.add_reg_to_slot( op_sym.to_s + "save ret" , other , :message , :return_value)
|
||||||
compiler.add_mom( Mom::ReturnSequence.new)
|
compiler.add_mom( Mom::ReturnSequence.new)
|
||||||
return compiler.method
|
return compiler.method
|
||||||
end
|
end
|
||||||
|
@ -1,5 +1,8 @@
|
|||||||
module Risc
|
module Risc
|
||||||
|
|
||||||
|
def self.operators
|
||||||
|
[:+, :-, :>>, :<<, :*, :&, :|]
|
||||||
|
end
|
||||||
# Destructive operator instructions on the two registers given
|
# Destructive operator instructions on the two registers given
|
||||||
#
|
#
|
||||||
# left = left OP right
|
# left = left OP right
|
||||||
@ -11,7 +14,7 @@ module Risc
|
|||||||
def initialize( source , operator , left , right )
|
def initialize( source , operator , left , right )
|
||||||
super(source)
|
super(source)
|
||||||
@operator = operator
|
@operator = operator
|
||||||
raise "unsuported operator :#{operator}:" unless [:+, :-, :>>, :<<, :*, :&, :|, :==].include?(operator)
|
raise "unsuported operator :#{operator}:" unless Risc.operators.include?(operator)
|
||||||
@left = left
|
@left = left
|
||||||
@right = right
|
@right = right
|
||||||
raise "Not register #{left}" unless RiscValue.look_like_reg(left)
|
raise "Not register #{left}" unless RiscValue.look_like_reg(left)
|
||||||
|
@ -34,7 +34,7 @@ class TestSpace < MiniTest::Test
|
|||||||
|
|
||||||
def test_integer
|
def test_integer
|
||||||
int = Parfait.object_space.get_class_by_name :Integer
|
int = Parfait.object_space.get_class_by_name :Integer
|
||||||
assert_equal 6, int.instance_type.method_names.get_length
|
assert_equal 10, int.instance_type.method_names.get_length
|
||||||
end
|
end
|
||||||
|
|
||||||
def test_classes_class
|
def test_classes_class
|
||||||
|
@ -29,6 +29,10 @@ module Risc
|
|||||||
run_all "4 * 4"
|
run_all "4 * 4"
|
||||||
assert_equal 16 , get_return.value
|
assert_equal 16 , get_return.value
|
||||||
end
|
end
|
||||||
|
def test_smaller
|
||||||
|
run_all "4 < 5"
|
||||||
|
assert_equal 16 , get_return.value
|
||||||
|
end
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
@ -11,19 +11,13 @@ module Risc
|
|||||||
|
|
||||||
def test_chain
|
def test_chain
|
||||||
#show_main_ticks # get output of what is
|
#show_main_ticks # get output of what is
|
||||||
check_main_chain [Label, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
|
check_main_chain [Label, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
|
||||||
SlotToReg, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
|
SlotToReg, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
|
||||||
IsZero, SlotToReg, SlotToReg, SlotToReg, LoadConstant,
|
IsZero, SlotToReg, SlotToReg, SlotToReg, LoadConstant,
|
||||||
RegToSlot, LoadConstant, LoadConstant, SlotToReg, SlotToReg,
|
RegToSlot, LoadConstant, LoadConstant, SlotToReg, SlotToReg,
|
||||||
Label, LoadConstant, SlotToReg, OperatorInstruction, IsZero,
|
Label, LoadConstant, SlotToReg, OperatorInstruction, IsZero,
|
||||||
SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch,
|
SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch,
|
||||||
Label, LoadConstant, SlotToReg, OperatorInstruction, IsZero,
|
Label, LoadConstant, SlotToReg, OperatorInstruction, IsZero,
|
||||||
SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch,
|
|
||||||
Label, LoadConstant, SlotToReg, OperatorInstruction, IsZero,
|
|
||||||
SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch,
|
|
||||||
Label, LoadConstant, SlotToReg, OperatorInstruction, IsZero,
|
|
||||||
SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch,
|
|
||||||
Label, LoadConstant, SlotToReg, OperatorInstruction, IsZero,
|
|
||||||
SlotToReg, OperatorInstruction, IsZero, Label, RegToSlot,
|
SlotToReg, OperatorInstruction, IsZero, Label, RegToSlot,
|
||||||
Label, LoadConstant, SlotToReg, LoadConstant, SlotToReg,
|
Label, LoadConstant, SlotToReg, LoadConstant, SlotToReg,
|
||||||
RegToSlot, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
|
RegToSlot, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
|
||||||
@ -53,16 +47,16 @@ module Risc
|
|||||||
end
|
end
|
||||||
|
|
||||||
def test_dyn
|
def test_dyn
|
||||||
cal = main_ticks(98)
|
cal = main_ticks(68)
|
||||||
assert_equal DynamicJump , cal.class
|
assert_equal DynamicJump , cal.class
|
||||||
end
|
end
|
||||||
#should end in exit, but doesn't, becasue resolve never returns
|
#should end in exit, but doesn't, becasue resolve never returns
|
||||||
def test_sys
|
def test_sys
|
||||||
sys = main_ticks(129)
|
sys = main_ticks(99)
|
||||||
assert_equal Syscall , sys.class
|
assert_equal Syscall , sys.class
|
||||||
end
|
end
|
||||||
def test_return
|
def test_return
|
||||||
ret = main_ticks(127)
|
ret = main_ticks(97)
|
||||||
assert_equal FunctionReturn , ret.class
|
assert_equal FunctionReturn , ret.class
|
||||||
link = @interpreter.get_register( ret.register )
|
link = @interpreter.get_register( ret.register )
|
||||||
assert_equal Label , link.class
|
assert_equal Label , link.class
|
||||||
|
Loading…
Reference in New Issue
Block a user