fixing register order in some instructions
and their use Arm is confusing as it has result as first arg we use forward logic, i.e. from -> to
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@ -41,7 +41,7 @@ module Register
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# load the frame/message from space by index
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new_codes << GetSlot.new( space_tmp , 5 , frame_tmp )
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# save the frame in real frame register
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new_codes << RegisterTransfer.new( RegisterReference.frame_reg , frame_tmp )
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new_codes << RegisterTransfer.new( frame_tmp , RegisterReference.frame_reg )
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# get the next_frame
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new_codes << GetSlot.new( frame_tmp , 2 , frame_tmp) # 2 index of next_frame
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# save next frame into space
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