fixing register order in some instructions

and their use
Arm is confusing as it has result as first arg
we use forward logic, i.e. from -> to
This commit is contained in:
Torsten Ruger
2015-06-27 20:09:21 +03:00
parent add79e5157
commit 97b4c469f8
6 changed files with 18 additions and 6 deletions

View File

@ -62,7 +62,7 @@ module Builtin
# get the sys return out of the way
return_tmp = Register::RegisterReference.tmp_reg
# load the space into the base register
function.info.add_code Register::RegisterTransfer.new( Virtual::Slot::MESSAGE_REGISTER , return_tmp )
function.info.add_code Register::RegisterTransfer.new( return_tmp , Virtual::Slot::MESSAGE_REGISTER )
slot = Virtual::Slot
# find the stored message
ind = Parfait::Space.object_space.get_layout().index_of( :syscall_message )