fixing register order in some instructions

and their use
Arm is confusing as it has result as first arg
we use forward logic, i.e. from -> to
This commit is contained in:
Torsten Ruger
2015-06-27 20:09:21 +03:00
parent add79e5157
commit 97b4c469f8
6 changed files with 18 additions and 6 deletions

View File

@ -4,7 +4,9 @@ module Arm
def run block
block.codes.dup.each do |code|
next unless code.is_a? Register::GetSlot
load = ArmMachine.ldr( code.register , code.array , code.index )
# times 4 because arm works in bytes, but vm in words
# + 1 because of the type word
load = ArmMachine.ldr( code.register , code.array , 4 * (code.index + 1) )
block.replace(code , load )
end
end

View File

@ -4,7 +4,9 @@ module Arm
def run block
block.codes.dup.each do |code|
next unless code.is_a? Register::SetSlot
store = ArmMachine.str( code.register , code.array , code.index )
# times 4 because arm works in bytes, but vm in words
# + 1 because of the type word
store = ArmMachine.str( code.register , code.array , 4 * (code.index + 1) )
block.replace(code , store )
end
end

View File

@ -4,7 +4,9 @@ module Arm
def run block
block.codes.dup.each do |code|
next unless code.is_a? Register::RegisterTransfer
move = ArmMachine.mov( code.from , code.to )
# Register machine convention is from => to
# But arm has the receiver/result as the first
move = ArmMachine.mov( code.to , code.from)
block.replace(code , move )
end
end