avoid adding risc instructions twice
that causes loops in the chain infinite loops in the code that are hard to debug closes #11
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@ -12,8 +12,7 @@ module Mom
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@label = label
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end
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def to_risc(compiler)
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label = @label.to_risc(compiler)
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compiler.add_code Risc::Branch.new(self , label)
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compiler.add_code Risc::Branch.new(self , @label.risc_label)
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end
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end
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@ -8,6 +8,19 @@ module Mom
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#
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# A Label has a name which is mainly used for debugging.
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#
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# A Mom::Label converts one2one to a Risc::Label. So in a way it could not be more
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# simple.
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# Alas, since almost by definition several roads lead to this label, all those
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# several converted instructions must also point to the identical label on the
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# risc level.
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#
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# This is achieved by caching the created Risc::Label in an instance variable.
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# All branches that lead to this label can thus safely call the to_risc and
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# whoever calls first triggers the labels creation, but all get the same label.
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#
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# Off course some specific place still has to be responsible for actually
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# adding the label to the instruction list (usually an if/while)
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class Label < Instruction
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attr_reader :name
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def initialize(name)
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@ -18,20 +31,20 @@ module Mom
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"Label: #{name}"
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end
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# A Mom::Label converts one2one to a Risc::Label. So in a way it could not be more
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# simple.
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# Alas, since almost by definition several roads lead to this label, all those
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# several converted instructions must also point to the identical label on the
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# risc level.
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#
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# This is achieved by caching the created Risc::Label in an instance variable.
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# All branches that lead to this label can thus safely call the to_risc and
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# whoever calls first triggers the labels creation, but all get the same label.
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#
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# Off course some specific place still has to be responsible for actually
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# adding the label to the instruction list (usually an if/while)
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def to_risc(compiler)
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# generate the risc label lazily
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def risc_label
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@risc_label ||= Risc.label(self,name)
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end
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# add the risc_label to the compiler (instruction flow)
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# should only be called once
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def to_risc(compiler)
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if( @added )
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raise "added already #{@added}"
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else
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@added = true
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compiler.add_code( risc_label )
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end
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end
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end
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end
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@ -26,7 +26,7 @@ module Mom
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l_reg = left.to_register(compiler, self)
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r_reg = right.to_register(compiler, self)
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compiler.add_code Risc.op( self , :- , l_reg , r_reg)
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compiler.add_code Risc::IsZero.new( self, false_jump.to_risc(compiler))
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compiler.add_code Risc::IsZero.new( self, false_jump.risc_label)
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end
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end
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end
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@ -19,7 +19,7 @@ module Mom
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end
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def to_risc(compiler)
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false_label = @false_jump.to_risc(compiler)
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false_label = @false_jump.risc_label
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builder = compiler.builder("TruthCheck")
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condition_reg = @condition.to_register(compiler,self)
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builder.build do
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@ -16,10 +16,11 @@ module Risc
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@constants = []
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@block_compilers = []
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@risc_instructions = Risc.label(source_name, source_name)
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@current = @risc_instructions
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@current = start = @risc_instructions
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add_code Risc.label( source_name, "return_label")
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Mom::ReturnSequence.new.to_risc(self)
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add_code Risc.label( source_name, "unreachable")
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@current = start
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reset_regs
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end
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attr_reader :risc_instructions , :constants , :block_compilers , :callable , :current
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@ -50,5 +50,10 @@ module Risc
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sl = @produced.next( 7 )
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assert_reg_to_slot( sl , :r1 , :r3 , 7 )
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end
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def test_label
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sl = @produced.next( 17 )
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assert_equal Risc::Label , sl.class
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assert_equal "return_label" , sl.name
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end
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end
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end
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@ -1,4 +1,4 @@
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require_relative "../helper"
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require_relative "helper"
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module Risc
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class TestReturnSequence < MiniTest::Test
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