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rename extra to right in logic inst

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This commit is contained in:
Torsten Ruger 2014-05-16 11:27:30 +03:00
parent ccafb09224
commit 87e0f297e3
4 changed files with 24 additions and 25 deletions
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10
lib/arm/arm_machine.rb
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@ -16,12 +16,12 @@ module Arm
end end
def integer_plus block , result , first , right def integer_plus block , result , first , right
block.add_code add( result , right: first , :extra => right ) block.add_code add( result , left: first , :extra => right )
result result
end end
def integer_minus block , result , first , right def integer_minus block , result , first , right
block.add_code sub( result , right: first , :extra => right ) block.add_code sub( result , left: first , :extra => right )
result result
end end
@ -88,7 +88,7 @@ module Arm
# BL udiv10 # r1 = r1 / 10 # BL udiv10 # r1 = r1 / 10
div10( tos , number , remainder ) div10( tos , number , remainder )
# ADD r10, r10, 48 #'0' # make char out of digit (by using ascii encoding) # ADD r10, r10, 48 #'0' # make char out of digit (by using ascii encoding)
tos.add_code add( remainder , right: remainder , extra: 48 ) tos.add_code add( remainder , left: remainder , right: 48 )
#STRB r10, [r1], 1 # store digit at end of buffer #STRB r10, [r1], 1 # store digit at end of buffer
tos.add_code strb( remainder , right: string ) #and increment TODO check tos.add_code strb( remainder , right: string ) #and increment TODO check
# CMP r1, #0 # quotient non-zero? # CMP r1, #0 # quotient non-zero?
@ -110,9 +110,9 @@ module Arm
# takes argument in r1 # takes argument in r1
# returns quotient in r1, remainder in r2 # returns quotient in r1, remainder in r2
# SUB r2, r1, #10 # keep (x-10) for later # SUB r2, r1, #10 # keep (x-10) for later
block.add_code sub( remainder , right: number , :extra => 10 ) block.add_code sub( remainder , left: number , right: 10 )
# SUB r1, r1, r1, lsr #2 # SUB r1, r1, r1, lsr #2
block.add_code add( number , right: number , extra: number , shift_right: 4) block.add_code add( number , left: number , right: number , shift_right: 4)
# ADD r1, r1, r1, lsr #4 # ADD r1, r1, r1, lsr #4
# ADD r1, r1, r1, lsr #8 # ADD r1, r1, r1, lsr #8
# ADD r1, r1, r1, lsr #16 # ADD r1, r1, r1, lsr #16

13
lib/arm/logic_instruction.rb
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@ -11,7 +11,8 @@ module Arm
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil @attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@operand = 0 @operand = 0
@left = nil @left = @attributes[:left]
raise "Left arg must be given #{inspect}" unless @left
@i = 0 @i = 0
end end
@ -22,13 +23,11 @@ module Arm
# Build representation for source value # Build representation for source value
def build def build
@left = @attributes[:left] arg = @attributes[:right]
arg = @attributes[:extra] if @left.is_a?(Vm::StringConstant)
if arg.is_a?(Vm::StringConstant)
# do pc relative addressing with the difference to the instuction # do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute) # 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
arg = Vm::IntegerConstant.new( arg.position - self.position - 8 ) arg = Vm::IntegerConstant.new( @left.position - self.position - 8 )
@left = :pc @left = :pc
end end
if( arg.is_a? Fixnum ) #HACK to not have to change the code just now if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
@ -94,7 +93,7 @@ module Arm
io.write_uint32 val io.write_uint32 val
end end
def shift val , by def shift val , by
raise "Not integer #{val}:#{val.class}" unless val.is_a? Fixnum raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
val << by val << by
end end
end end

20
test/test_arm.rb
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@ -27,15 +27,15 @@ class TestArmAsm < MiniTest::Test
end end
end end
def test_adc def test_adc
code = @machine.adc :r1, left: :r3, :extra => :r5 code = @machine.adc :r1, left: :r3, right: :r5
assert_code code , :adc , [0x05,0x10,0xa3,0xe0] #e0 a3 10 05 assert_code code , :adc , [0x05,0x10,0xa3,0xe0] #e0 a3 10 05
end end
def test_add def test_add
code = @machine.add :r1 , left: :r1, :extra => :r3 code = @machine.add :r1 , left: :r1, right: :r3
assert_code code , :add , [0x03,0x10,0x81,0xe0] #e0 81 10 03 assert_code code , :add , [0x03,0x10,0x81,0xe0] #e0 81 10 03
end end
def test_and # inst eval doesn't really work with and def test_and # inst eval doesn't really work with and
code = @machine.and( :r1 , left: :r2 , :extra => :r3) code = @machine.and( :r1 , left: :r2 , right: :r3)
assert_code code , :and , [0x03,0x10,0x02,0xe0] #e0 01 10 03 assert_code code , :and , [0x03,0x10,0x02,0xe0] #e0 01 10 03
end end
def test_b def test_b
@ -50,7 +50,7 @@ class TestArmAsm < MiniTest::Test
assert_code code , :call, [0xff,0xff,0xff,0xeb] #ea ff ff fe assert_code code , :call, [0xff,0xff,0xff,0xeb] #ea ff ff fe
end end
def test_bic def test_bic
code = @machine.bic :r2 , left: :r2 , :extra => :r3 code = @machine.bic :r2 , left: :r2 , right: :r3
assert_code code , :bic , [0x03,0x20,0xc2,0xe1] #e3 c2 20 44 assert_code code , :bic , [0x03,0x20,0xc2,0xe1] #e3 c2 20 44
end end
def test_cmn def test_cmn
@ -62,7 +62,7 @@ class TestArmAsm < MiniTest::Test
assert_code code , :cmp , [0x02,0x00,0x51,0xe1] #e1 51 00 02 assert_code code , :cmp , [0x02,0x00,0x51,0xe1] #e1 51 00 02
end end
def test_eor def test_eor
code = @machine.eor :r2 , left: :r2 , :extra => :r3 code = @machine.eor :r2 , left: :r2 , right: :r3
assert_code code , :eor , [0x03,0x20,0x22,0xe0] #e0 22 20 03 assert_code code , :eor , [0x03,0x20,0x22,0xe0] #e0 22 20 03
end end
def test_ldr def test_ldr
@ -78,7 +78,7 @@ class TestArmAsm < MiniTest::Test
assert_code code, :ldrb , [0x00,0x00,0xd0,0xe5] #e5 d0 00 00 assert_code code, :ldrb , [0x00,0x00,0xd0,0xe5] #e5 d0 00 00
end end
def test_orr def test_orr
code = @machine.orr :r2 , left: :r2 , :extra => :r3 code = @machine.orr :r2 , left: :r2 , right: :r3
assert_code code , :orr , [0x03,0x20,0x82,0xe1] #e1 82 20 03 assert_code code , :orr , [0x03,0x20,0x82,0xe1] #e1 82 20 03
end end
def test_push def test_push
@ -90,15 +90,15 @@ class TestArmAsm < MiniTest::Test
assert_code code , :pop , [0x00,0x80,0xbd,0xe8] #e8 bd 80 00 assert_code code , :pop , [0x00,0x80,0xbd,0xe8] #e8 bd 80 00
end end
def test_rsb def test_rsb
code = @machine.rsb :r1 , left: :r2 , :extra => :r3 code = @machine.rsb :r1 , left: :r2 , right: :r3
assert_code code , :rsb , [0x03,0x10,0x62,0xe0]#e0 62 10 03 assert_code code , :rsb , [0x03,0x10,0x62,0xe0]#e0 62 10 03
end end
def test_rsc def test_rsc
code = @machine.rsc :r2 , left: :r3 , :extra => :r4 code = @machine.rsc :r2 , left: :r3 , right: :r4
assert_code code , :rsc , [0x04,0x20,0xe3,0xe0]#e0 e3 20 04 assert_code code , :rsc , [0x04,0x20,0xe3,0xe0]#e0 e3 20 04
end end
def test_sbc def test_sbc
code = @machine.sbc :r3, left: :r4 , :extra => :r5 code = @machine.sbc :r3, left: :r4 , right: :r5
assert_code code , :sbc , [0x05,0x30,0xc4,0xe0]#e0 c4 30 05 assert_code code , :sbc , [0x05,0x30,0xc4,0xe0]#e0 c4 30 05
end end
def test_str def test_str
@ -110,7 +110,7 @@ class TestArmAsm < MiniTest::Test
assert_code code, :strb , [0x00,0x00,0xc0,0xe5] #e5 c0 00 00 assert_code code, :strb , [0x00,0x00,0xc0,0xe5] #e5 c0 00 00
end end
def test_sub def test_sub
code = @machine.sub :r2, left: :r0, :extra => 1 code = @machine.sub :r2, left: :r0, right: 1
assert_code code, :sub , [0x01,0x20,0x40,0xe2] #e2 40 20 01 assert_code code, :sub , [0x01,0x20,0x40,0xe2] #e2 40 20 01
end end
def test_swi def test_swi

4
test/test_small_program.rb
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@ -18,7 +18,7 @@ class TestSmallProg < MiniTest::Test
start = Vm::Block.new("start") start = Vm::Block.new("start")
add_code start add_code start
start.instance_eval do start.instance_eval do
sub :r0, left: :r0, :extra => 1 , :update_status_flag => 1 #2 sub :r0, left: :r0, right: 1 , :update_status_flag => 1 #2
bne start ,{} #3 bne start ,{} #3
end end
end end
@ -31,7 +31,7 @@ class TestSmallProg < MiniTest::Test
@program.main.instance_eval do @program.main.instance_eval do
mov :r7, right: 4 # 4 == write mov :r7, right: 4 # 4 == write
mov :r0 , right: 1 # stdout mov :r0 , right: 1 # stdout
add :r1 , :extra => hello # address of "hello Raisa" add :r1 , left: hello # address of "hello Raisa"
mov :r2 , right: hello.length mov :r2 , right: hello.length
swi 0 , {} #software interupt, ie kernel syscall swi 0 , {} #software interupt, ie kernel syscall
end end