large test changes due to change in cc

calling convention does affect
less than before, but still a LOT
This commit is contained in:
Torsten Ruger 2018-08-12 15:02:23 +03:00
parent fee9e261a5
commit 86462e238a
27 changed files with 335 additions and 415 deletions

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@ -7,12 +7,10 @@ module Risc
def setup
super
@input = "r = 5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, Label, SlotToReg, SlotToReg,
RegToSlot]
@expect = [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg,
FunctionCall, Label, SlotToReg, SlotToReg, RegToSlot]
end
def test_local_assign_instructions
assert_nil msg = check_nil , msg
@ -20,7 +18,7 @@ module Risc
def test_constant_load
produced = produce_body
load = produced.next(14)
load = produced.next(8)
assert_equal LoadConstant , load.class
assert_equal 5 , load.constant.value
end

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@ -10,8 +10,8 @@ module Risc
@expect = "something"
@produced = produce_instructions
end
def instruction(num) # 24 is the main, see test/mom/send/test_setup_simple.rb
@produced.next( 24 + num)
def instruction(num) # 18 is the main, see length in test/mom/send/test_setup_simple.rb
@produced.next( 18 + num)
end
def test_postamble_classes
postamble.each_with_index do |ins , index|

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@ -15,12 +15,11 @@ module Risc
Branch, Label, Transfer, Syscall, Transfer,
Transfer, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, Label, RegToSlot, Label,
LoadConstant, SlotToReg, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, LoadConstant, SlotToReg,
DynamicJump, Label]
LoadConstant, SlotToReg, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, LoadConstant, SlotToReg, DynamicJump,
Label]
end
def test_send_instructions
@ -38,7 +37,7 @@ module Risc
end
def test_function_call
produced = produce_body
assert_equal DynamicJump , produced.next(65).class
assert_equal DynamicJump , produced.next(59).class
end
def test_cache_check
produced = produce_body

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@ -7,36 +7,33 @@ module Risc
def setup
super
@input = "5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, Label]
@expect = [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg,
FunctionCall, Label]
end
def test_send_instructions
assert_nil msg = check_nil , msg
end
def test_load_5
produced = produce_body
assert_equal 5 , produced.next(14).constant.value
produced = produce_body.next(8)
assert_load( produced , Parfait::Integer)
assert_equal 5 , produced.constant.value
end
def test_load_label
produced = produce_body
assert_equal Label , produced.next(17).constant.class
end
def test_call_reg_setup
produced = produce_body
assert_equal :div4 , produced.next(21).method.name
produced = produce_body.next(11)
assert_load( produced , Label)
end
def test_function_call
produced = produce_body
assert_equal FunctionCall , produced.next(21).class
assert_equal :div4 , produced.next(21).method.name
produced = produce_body.next(15)
assert_equal FunctionCall , produced.class
assert_equal :div4 , produced.method.name
end
def test_check_continue
produced = produce_body
assert produced.next(22).name.start_with?("continue_")
produced = produce_body.next(16)
assert_equal Label , produced.class
assert produced.name.start_with?("continue_")
end
#TODO check the message setup, type and frame moves
end

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@ -7,12 +7,11 @@ module Risc
def setup
super
@input = "5.get_internal_word(1)"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg,
FunctionCall, Label]
@expect = [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall,
Label]
end
def test_send_instructions
@ -20,64 +19,45 @@ module Risc
end
def test_load_5
produced = produce_body
assert_equal 5 , produced.next(14).constant.value
assert_equal LoadConstant , produced.next(8).class
assert_equal 5 , produced.next(8).constant.value
end
def base
17
11
end
def test_load_arg_const
produced = produce_body
assert_equal LoadConstant , produced.next(base).class
assert_equal Parfait::Integer , produced.next(base).constant.class
assert_load( produced.next(base) , Parfait::Integer )
assert_equal 1 , produced.next(base).constant.value
end
def test_load_next_m
produced = produce_body
assert_equal SlotToReg , produced.next(base+1).class
assert_equal :r2 , produced.next(base+1).register.symbol
assert_equal :r0 , produced.next(base+1).array.symbol
assert_equal 1 , produced.next(base+1).index
produced = produce_body.next(base+1)
assert_slot_to_reg( produced ,:r0 ,1 , :r2 )
end
def test_load_args
produced = produce_body
assert_equal SlotToReg , produced.next(base+2).class
assert_equal :r2 , produced.next(base+2).register.symbol
assert_equal :r2 , produced.next(base+2).array.symbol
assert_equal 8 , produced.next(base+2).index
produced = produce_body.next(base+2)
assert_slot_to_reg( produced ,:r2 ,8 , :r2 )
end
def test_store_arg_at
produced = produce_body
assert_equal RegToSlot , produced.next(base+3).class
assert_equal :r1 , produced.next(base+3).register.symbol
assert_equal :r2 , produced.next(base+3).array.symbol
assert_equal 1 , produced.next(base+3).index , "first arg must have index 1"
produced = produce_body.next(base+3)
assert_reg_to_slot( produced ,:r1 ,:r2 , 1 )
end
def test_load_label
produced = produce_body
assert_equal LoadConstant , produced.next(base+4).class
assert_equal Label , produced.next(base+4).constant.class
produced = produce_body.next(base+4)
assert_load( produced , Label )
end
def test_load_some
produced = produce_body
assert_equal SlotToReg , produced.next(base+5).class
assert_equal :r0 , produced.next(base+5).array.symbol
assert_equal :r2 , produced.next(base+5).register.symbol
assert_equal 1 , produced.next(base+5).index
produced = produce_body.next(base+5)
assert_slot_to_reg( produced ,:r0 ,1 , :r2 )
end
def test_store_
produced = produce_body
assert_equal RegToSlot , produced.next(base+6).class
assert_equal :r2 , produced.next(base+6).array.symbol
assert_equal :r1 , produced.next(base+6).register.symbol
assert_equal 4 , produced.next(base+6).index
produced = produce_body.next(base+6)
assert_reg_to_slot( produced ,:r1 ,:r2 , 4 )
end
def test_swap_messages
produced = produce_body
assert_equal SlotToReg , produced.next(base+7).class
assert_equal :r0 , produced.next(base+7).array.symbol
assert_equal :r0 , produced.next(base+7).register.symbol
assert_equal 1 , produced.next(base+7).index
produced = produce_body.next(base+7)
assert_slot_to_reg( produced ,:r0 ,1 , :r0 )
end
def test_function_call
@ -89,6 +69,5 @@ module Risc
produced = produce_body
assert produced.next(base+9).name.start_with?("continue_")
end
#TODO check the message setup, type and frame moves
end
end

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@ -7,11 +7,10 @@ module Risc
def setup
super
@input = "5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, Label]
@expect = [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg,
FunctionCall, Label]
@produced = produce_body
end
@ -31,51 +30,25 @@ module Risc
sl = @produced.next( 2 )
assert_slot_to_reg( sl , :r2 , 3 , :r3 )
end
def test_store_message_in_current
def test_get_next_next #reduce onto itself
sl = @produced.next( 3 )
assert_slot_to_reg( sl , :r3 , 1 , :r4 )
end
def test_store_next_next_in_space
sl = @produced.next( 4 )
assert_reg_to_slot( sl , :r4 , :r2 , 3 )
end
def test_store_message_in_current
sl = @produced.next( 5 )
assert_reg_to_slot( sl , :r3 , :r0 , 1 )
end
def test_store_caller_in_message
sl = @produced.next( 4 )
sl = @produced.next( 6 )
assert_reg_to_slot( sl , :r0 , :r3 , 6 )
end
def test_get_args_type #from method in r1
sl = @produced.next( 5 )
assert_slot_to_reg( sl , :r1 , 3 , :r4 )
end
def test_get_args #from message
sl = @produced.next( 6 )
assert_slot_to_reg( sl , :r3 , 8 , :r5 )
end
def test_store_type_in_args
sl = @produced.next( 7 )
assert_reg_to_slot( sl , :r4 , :r5 , 0 )
end
def test_get_frame_type #from method in r1
sl = @produced.next( 8 )
assert_slot_to_reg( sl , :r1 , 5 , :r4 )
end
def test_get_frame #from message
sl = @produced.next( 9 )
assert_slot_to_reg( sl , :r3 , 3 , :r5 )
end
def test_store_type_in_frame
sl = @produced.next( 10 )
assert_reg_to_slot( sl , :r4 , :r5 , 0 )
end
def test_store_method_in_message
sl = @produced.next( 11 )
sl = @produced.next( 7 )
assert_reg_to_slot( sl , :r1 , :r3 , 7 )
end
def test_get_next_next #reduce onto itself
sl = @produced.next( 12 )
assert_slot_to_reg( sl , :r3 , 1 , :r3 )
end
def test_store_next_next_in_space
sl = @produced.next( 13 )
assert_reg_to_slot( sl , :r3 , :r2 , 3 )
end
end
end

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@ -7,26 +7,25 @@ module Risc
def setup
super
@input = "return 5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, Label, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, Branch]
@expect = [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg,
FunctionCall, Label, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, Branch]
end
def test_return_instructions
assert_nil msg = check_nil , msg
end
def test_function_return
produced = produce_body
assert_equal Branch , produced.next(29).class
assert_equal "return_label" , produced.next(29).label.name
produced = produce_body.next(23)
assert_equal Branch , produced.class
assert_equal "return_label" , produced.label.name
end
def test_load_5
produced = produce_body
assert_equal LoadConstant , produced.next(14).class
assert_equal 5 , produced.next(14).constant.value
produced = produce_body.next(8)
assert_equal LoadConstant , produced.class
assert_equal 5 , produced.constant.value
end
end
end

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@ -15,13 +15,12 @@ module Risc
Branch, Label, Transfer, Syscall, Transfer,
Transfer, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, Label, RegToSlot, Label,
LoadConstant, SlotToReg, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, LoadConstant, SlotToReg,
DynamicJump, Label, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, Branch]
LoadConstant, SlotToReg, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, LoadConstant, SlotToReg, DynamicJump,
Label, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, Branch]
end
def test_return_instructions
@ -29,9 +28,9 @@ module Risc
end
def test_function_return
produced = produce_body
assert_equal Branch , produced.next(73).class
assert_equal Branch , produced.next(67).class
end
def est_cache_check
def test_cache_check
produced = produce_body
assert_equal IsZero , produced.next(6).class
end

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@ -7,15 +7,14 @@ module Risc
def setup
super
@input = "while(5 > 0) ; @a = true; end"
@expect = [Label, LoadConstant, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, Label, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, LoadConstant, OperatorInstruction,
IsZero, LoadConstant, OperatorInstruction, IsZero, LoadConstant,
SlotToReg, RegToSlot, Branch, Label]
@expect = [Label, LoadConstant, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, RegToSlot, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg,
FunctionCall, Label, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsZero,
LoadConstant, OperatorInstruction, IsZero, LoadConstant, SlotToReg,
RegToSlot, Branch, Label]
end
def test_while_instructions
@ -26,33 +25,33 @@ module Risc
end
def test_int_load_5
produced = produce_body
load = produced.next(15)
load = produced.next(9)
assert_equal Risc::LoadConstant , load.class
assert_equal Parfait::Integer , load.constant.class
assert_equal 5 , load.constant.value
end
def test_int_load_0
produced = produce_body
load = produced.next(18)
load = produced.next(12)
assert_equal Risc::LoadConstant , load.class
assert_equal Parfait::Integer , load.constant.class
assert_equal 0 , load.constant.value
end
def test_false_check
produced = produce_body
assert_equal Risc::IsZero , produced.next(35).class
assert produced.next(35).label.name.start_with?("merge_label") , produced.next(35).label.name
assert_equal Risc::IsZero , produced.next(29).class
assert produced.next(29).label.name.start_with?("merge_label") , produced.next(29).label.name
end
def test_nil_load
produced = produce_body
assert_equal Risc::LoadConstant , produced.next(36).class
assert_equal Parfait::NilClass , produced.next(36).constant.class
assert_equal Risc::LoadConstant , produced.next(30).class
assert_equal Parfait::NilClass , produced.next(30).constant.class
end
def test_back_jump # should jump back to condition label
produced = produce_body
assert_equal Risc::Branch , produced.next(42).class
assert_equal produced , produced.next(42).label
assert_equal Risc::Branch , produced.next(36).class
assert_equal produced , produced.next(36).label
end
end

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@ -15,7 +15,7 @@ module Risc
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, Branch, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer,
SlotToReg, SlotToReg, Branch, Syscall, NilClass]
SlotToReg, SlotToReg, Syscall, NilClass]
assert_equal 15 , get_return
end
@ -41,7 +41,7 @@ module Risc
assert_equal Transfer , transfer.class
end
def test_sys
sys = main_ticks(24)
sys = main_ticks(23)
assert_equal Syscall , sys.class
end
end

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@ -12,55 +12,52 @@ module Risc
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, LoadConstant, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, Branch, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, Branch, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall,
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg,
SlotToReg, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, Branch, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, RegToSlot,
RegToSlot, LoadConstant, LoadConstant, SlotToReg, SlotToReg, # 10
RegToSlot, RegToSlot, RegToSlot, Branch, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg, # 20
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, Branch, SlotToReg, SlotToReg,
DynamicJump, LoadConstant, SlotToReg, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, RegToSlot, Branch, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, Branch,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, Branch, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, SlotToReg, RegToSlot, Branch, SlotToReg,
SlotToReg, Branch, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, Transfer, SlotToReg, SlotToReg, Branch,
Syscall, NilClass]
RegToSlot, SlotToReg, Branch, FunctionCall, LoadConstant, # 30
SlotToReg, OperatorInstruction, IsZero, SlotToReg, SlotToReg,
LoadConstant, SlotToReg, SlotToReg, RegToSlot, RegToSlot, # 40
RegToSlot, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg, # 50
SlotToReg, SlotToReg, DynamicJump, LoadConstant, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, RegToSlot, # 60
Branch, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, Branch, RegToSlot, RegToSlot, SlotToReg, # 70
SlotToReg, SlotToReg, FunctionReturn, SlotToReg, SlotToReg,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, # 80
Branch, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg, # 90
Branch, SlotToReg, FunctionReturn, SlotToReg, SlotToReg,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, # 100
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
Branch, SlotToReg, SlotToReg, FunctionReturn, Transfer, # 110
SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal 10 , get_return
end
def test_block_jump
load_ins = main_ticks(66)
load_ins = main_ticks(53)
assert_equal DynamicJump , load_ins.class
assert_equal Parfait::Block , @interpreter.get_register(load_ins.register).class
end
def test_block_load
load_ins = main_ticks(67)
load_ins = main_ticks(54)
assert_load load_ins , Parfait::Integer , :r1
assert_equal 10 , @interpreter.get_register(load_ins.register).value
end
def test_block_slot1
assert_slot_to_reg main_ticks(68) ,:r0 , 6 , :r2
assert_slot_to_reg main_ticks(55) ,:r0 , 6 , :r2
end
def test_block_slot2
assert_slot_to_reg main_ticks(69) ,:r2 , 6 , :r2
assert_slot_to_reg main_ticks(56) ,:r2 , 6 , :r2
end
def test_block_slot3
assert_slot_to_reg main_ticks(70) ,:r2 , 3 , :r2
assert_slot_to_reg main_ticks(57) ,:r2 , 3 , :r2
end
def test_block_reg
assert_reg_to_slot main_ticks(71) ,:r1 , :r2 , 1
assert_reg_to_slot main_ticks(58) ,:r1 , :r2 , 1
end
end
end

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@ -12,41 +12,38 @@ module Risc
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, SlotToReg, RegToSlot, LoadConstant, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, RegToSlot, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, Branch, RegToSlot,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, Branch, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, LoadConstant, SlotToReg, OperatorInstruction,
IsZero, SlotToReg, SlotToReg, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
Branch, SlotToReg, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, Branch,
SlotToReg, SlotToReg, DynamicJump, LoadConstant, RegToSlot,
Branch, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, Branch, FunctionReturn, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, RegToSlot, Branch, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, Branch, SlotToReg,
SlotToReg, Branch, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, Transfer, SlotToReg, SlotToReg, Branch,
Syscall, NilClass]
SlotToReg, SlotToReg, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall,
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg,
SlotToReg, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, Branch, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, DynamicJump, LoadConstant,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, Branch, FunctionReturn, SlotToReg,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, Branch, SlotToReg, FunctionReturn, SlotToReg,
SlotToReg, Branch, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
Branch, SlotToReg, SlotToReg, FunctionReturn, Transfer,
SlotToReg, SlotToReg, Syscall, NilClass]
assert_equal 15 , get_return
end
def test_load_return
load_ins = main_ticks(56)
load_ins = main_ticks(43)
assert_equal LoadConstant , load_ins.class
assert_equal Parfait::ReturnAddress , @interpreter.get_register(load_ins.register).class
end
def test_load_block
load_ins = main_ticks(63)
load_ins = main_ticks(49)
assert_equal DynamicJump , load_ins.class
assert_equal Parfait::Block , @interpreter.get_register(load_ins.register).class
assert_equal :main_block , @interpreter.get_register(load_ins.register).name

View File

@ -11,37 +11,36 @@ module Risc
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, FunctionCall, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, SlotToReg, SlotToReg, LoadData,
OperatorInstruction, LoadData, OperatorInstruction, OperatorInstruction, LoadData,
Transfer, Branch, OperatorInstruction, OperatorInstruction, LoadData,
Transfer, OperatorInstruction, OperatorInstruction, LoadData, Transfer,
OperatorInstruction, OperatorInstruction, LoadData, OperatorInstruction, LoadData,
Branch, Transfer, OperatorInstruction, OperatorInstruction, Transfer,
LoadData, OperatorInstruction, LoadData, OperatorInstruction, OperatorInstruction,
LoadConstant, SlotToReg, SlotToReg, RegToSlot, Branch,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, Branch, SlotToReg, RegToSlot,
Branch, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, Branch, FunctionReturn, Transfer, SlotToReg,
SlotToReg, Branch, Syscall, NilClass]
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, Branch, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, SlotToReg, # 20
SlotToReg, SlotToReg, SlotToReg, LoadData, OperatorInstruction,
LoadData, OperatorInstruction, OperatorInstruction, LoadData, Transfer, # 30
Branch, OperatorInstruction, OperatorInstruction, LoadData, Transfer,
OperatorInstruction, OperatorInstruction, LoadData, Transfer, OperatorInstruction, # 40
OperatorInstruction, LoadData, OperatorInstruction, LoadData, Branch,
Transfer, OperatorInstruction, OperatorInstruction, Transfer, LoadData, # 50
OperatorInstruction, LoadData, OperatorInstruction, OperatorInstruction, LoadConstant,
SlotToReg, SlotToReg, RegToSlot, Branch, RegToSlot, # 60
RegToSlot, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg, # 70
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, Branch, SlotToReg, # 80
SlotToReg, RegToSlot, Branch, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 90
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall,
NilClass, ]
assert_equal 2 , get_return
end
def test_load_25
load_ins = main_ticks 16
load_ins = main_ticks 9
assert_equal LoadConstant , load_ins.class
assert_equal 25 , @interpreter.get_register(load_ins.register).value
end
def test_return_class
ret = main_ticks(78)
ret = main_ticks(72)
assert_equal FunctionReturn , ret.class
link = @interpreter.get_register( ret.register )
assert_equal Fixnum , link.class

View File

@ -10,25 +10,24 @@ module Risc
end
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, ByteToReg, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
Branch, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, Branch, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer,
SlotToReg, SlotToReg, Branch, Syscall, NilClass]
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, Branch, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg, # 20
FunctionCall, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
ByteToReg, LoadConstant, SlotToReg, SlotToReg, RegToSlot, # 30
RegToSlot, RegToSlot, SlotToReg, SlotToReg, Branch,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot, # 40
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot, # 50
Branch, Branch, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg, # 60
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg,
SlotToReg, Syscall, NilClass, ]
assert_equal "H".ord , get_return
end
def test_byte_to_reg
done = main_ticks(32)
done = main_ticks(26)
assert_equal ByteToReg , done.class
assert_equal "H".ord , @interpreter.get_register(done.register)
end

View File

@ -11,32 +11,30 @@ module Risc
def test_minus
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, OperatorInstruction, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg,
Branch, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, Branch,
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, Branch, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg, # 20
FunctionCall, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, OperatorInstruction, LoadConstant, SlotToReg, SlotToReg, # 30
RegToSlot, RegToSlot, RegToSlot, SlotToReg, Branch,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 40
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
Transfer, SlotToReg, SlotToReg, Branch, Syscall,
NilClass]
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg, # 50
RegToSlot, Branch, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot, # 60
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer,
SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal 1 , get_return
end
def test_load_5
lod = main_ticks( 19 )
lod = main_ticks( 12 )
assert_equal LoadConstant , lod.class
assert_equal Parfait::Integer , lod.constant.class
assert_equal 5 , lod.constant.value
end
def test_op
op = main_ticks(33)
op = main_ticks(27)
assert_equal OperatorInstruction , op.class
assert_equal :r1 , op.left.symbol
assert_equal :r2 , op.right.symbol
@ -44,10 +42,10 @@ module Risc
assert_equal 5 , @interpreter.get_register(:r2)
end
def test_return
ret = main_ticks(70)
ret = main_ticks(64)
assert_equal FunctionReturn , ret.class
assert_equal :r1 , ret.register.symbol
assert_equal 26016 , @interpreter.get_register(ret.register)
assert_equal 26472 , @interpreter.get_register(ret.register)
end
end
end

View File

@ -11,31 +11,29 @@ module Risc
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, FunctionCall, SlotToReg, SlotToReg,
LoadData, OperatorInstruction, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, Branch, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, Branch,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, Branch, FunctionReturn,
Transfer, SlotToReg, SlotToReg, Branch, Syscall,
NilClass]
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, Branch, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, LoadData, # 20
OperatorInstruction, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, RegToSlot, # 30
Branch, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg, # 40
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
Branch, SlotToReg, SlotToReg, RegToSlot, Branch, # 50
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg, # 60
SlotToReg, Syscall, NilClass, ]
assert_equal 2 , get_return
end
def test_load
lod = main_ticks(16)
lod = main_ticks(9)
assert_equal LoadConstant , lod.class
assert_equal 9 , lod.constant.value
end
def test_fix # reduce self to fix
sl = main_ticks(25)
sl = main_ticks(19)
assert_equal SlotToReg , sl.class
assert_equal :r1 , sl.array.symbol
assert_equal 2 , sl.index

View File

@ -11,22 +11,20 @@ module Risc
def test_mult
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, OperatorInstruction, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg,
Branch, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, Branch,
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, Branch, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg, # 20
FunctionCall, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, OperatorInstruction, LoadConstant, SlotToReg, SlotToReg, # 30
RegToSlot, RegToSlot, RegToSlot, SlotToReg, Branch,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 40
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
Transfer, SlotToReg, SlotToReg, Branch, Syscall,
NilClass]
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg, # 50
RegToSlot, Branch, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot, # 60
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer,
SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal 0 , get_return
end
def test_zero
@ -34,7 +32,7 @@ module Risc
assert @interpreter.flags[:zero]
end
def test_op
op = main_ticks(33)
op = main_ticks(27)
assert_equal OperatorInstruction , op.class
assert_equal :r1 , op.left.symbol
assert_equal :r2 , op.right.symbol
@ -42,7 +40,7 @@ module Risc
assert_equal 2**31 , @interpreter.get_register(:r2)
end
def test_overflow
main_ticks( 34 )
main_ticks( 28 )
assert @interpreter.flags[:overflow]
end
end

View File

@ -11,31 +11,29 @@ module Risc
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, OperatorInstruction, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg,
Branch, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, Branch,
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, Branch, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, SlotToReg, # 20
FunctionCall, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, OperatorInstruction, LoadConstant, SlotToReg, SlotToReg, # 30
RegToSlot, RegToSlot, RegToSlot, SlotToReg, Branch,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 40
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
Transfer, SlotToReg, SlotToReg, Branch, Syscall,
NilClass]
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg, # 50
RegToSlot, Branch, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot, # 60
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer,
SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal 10 , get_return
end
def test_load_5
lod = main_ticks( 19 )
lod = main_ticks( 12 )
assert_load( lod , Parfait::Integer , :r1)
assert_equal 5 , lod.constant.value
end
def base
28
22
end
def test_slot_receiver #load receiver from message
sl = main_ticks( base )

View File

@ -11,32 +11,30 @@ module Risc
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, FunctionCall, SlotToReg, SlotToReg,
Transfer, Syscall, Transfer, Transfer, LoadConstant,
SlotToReg, SlotToReg, RegToSlot, RegToSlot, RegToSlot,
SlotToReg, Branch, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, Branch, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
Branch, FunctionReturn, Transfer, SlotToReg, SlotToReg,
Branch, Syscall, NilClass]
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, Branch, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, Transfer, # 20
Syscall, Transfer, Transfer, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg, # 30
Branch, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 40
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg, # 50
RegToSlot, Branch, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 60
Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal "Hello again" , @interpreter.stdout
assert_equal 11 , get_return #bytes written
end
def test_call
cal = main_ticks(23)
cal = main_ticks(17)
assert_equal FunctionCall , cal.class
assert_equal :putstring , cal.method.name
end
def test_putstring_sys
done = main_ticks(27)
done = main_ticks(21)
assert_equal Syscall , done.class
assert_equal "Hello again" , @interpreter.stdout
assert_equal 11 , @interpreter.get_register(:r0)
@ -44,28 +42,28 @@ module Risc
assert_equal "Hello again" , @interpreter.get_register(:r1).to_string
end
def test_move_sys_return
sl = main_ticks(28)
sl = main_ticks(22)
assert_equal Transfer , sl.class
assert_equal :r0 , sl.from.symbol
assert_equal :r2 , sl.to.symbol
assert_equal 11 , @interpreter.get_register(:r2)
end
def test_restore_message
sl = main_ticks(29)
sl = main_ticks(23)
assert_equal Transfer , sl.class
assert_equal :r8 , sl.from.symbol
assert_equal :r0 , sl.to.symbol
assert_equal Parfait::Message , @interpreter.get_register(:r0).class
end
def test_save_sys_return
sl = main_ticks(34)
sl = main_ticks(28)
assert_equal RegToSlot , sl.class
assert_equal :r2 , sl.register.symbol #return
assert_equal :r3 , sl.array.symbol #parfait integer
assert_equal 2 , sl.index
end
def test_return
done = main_ticks(67)
done = main_ticks(60)
assert_equal FunctionReturn , done.class
end

View File

@ -11,26 +11,25 @@ module Risc
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, Branch, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
RegToByte, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
Branch, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
Branch, SlotToReg, SlotToReg, Branch, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg,
SlotToReg, Branch, Syscall, NilClass]
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, Branch, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot, # 20
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall,
SlotToReg, SlotToReg, SlotToReg, SlotToReg, SlotToReg, # 30
SlotToReg, SlotToReg, SlotToReg, RegToByte, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, Branch, LoadConstant, # 40
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, Branch, # 50
RegToSlot, SlotToReg, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, # 60
RegToSlot, RegToSlot, SlotToReg, Branch, SlotToReg,
SlotToReg, FunctionReturn, Transfer, SlotToReg, SlotToReg, # 70
Syscall, NilClass, ]
assert_equal "K".ord , get_return
end
def test_reg_to_byte
done = main_ticks(41)
done = main_ticks(34)
assert_equal RegToByte , done.class
assert_equal "K".ord , @interpreter.get_register(done.register)
end

View File

@ -12,11 +12,11 @@ module Risc
def test_if
#show_main_ticks # get output of what is in main
check_main_chain [LoadConstant, LoadConstant, OperatorInstruction, IsZero, LoadConstant,
OperatorInstruction, IsZero, LoadConstant, RegToSlot, Branch,
OperatorInstruction, IsZero, LoadConstant, RegToSlot, Branch, # 10
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, Transfer, SlotToReg, SlotToReg, Branch,
Syscall, NilClass]
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 20
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall,
NilClass, ]
assert_equal 1 , get_return
end
def test_load_10
@ -40,7 +40,7 @@ module Risc
assert check.label.name.start_with?("false_label") , check.label.name
end
def test_exit
done = main_ticks(26)
done = main_ticks(25)
assert_equal Syscall , done.class
end
end

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@ -27,27 +27,26 @@ module Risc
OperatorInstruction, IsZero, Branch, SlotToReg, Branch,
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg,
OperatorInstruction, IsZero, RegToSlot, Branch, LoadConstant,
SlotToReg, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, Branch, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, LoadConstant, SlotToReg,
DynamicJump, SlotToReg, SlotToReg, LoadData, OperatorInstruction,
LoadConstant, SlotToReg, SlotToReg, RegToSlot, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, Branch,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, Branch,
SlotToReg, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, RegToSlot, Branch, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, LoadConstant, SlotToReg, DynamicJump,
SlotToReg, SlotToReg, LoadData, OperatorInstruction, LoadConstant,
SlotToReg, SlotToReg, RegToSlot, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, Branch, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, Branch, Branch,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, Branch, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, Transfer, SlotToReg, SlotToReg,
Branch, Syscall, NilClass]
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall,
NilClass]
assert_equal Fixnum , get_return.class
assert_equal 1 , get_return
end
def test_call_main
call_ins = ticks(25)
call_ins = ticks(main_at)
assert_equal FunctionCall , call_ins.class
assert_equal :main , call_ins.method.name
end
@ -58,17 +57,17 @@ module Risc
end
def test_dyn
cal = main_ticks(106)
cal = main_ticks(100)
assert_equal DynamicJump , cal.class
end
def test_return
ret = main_ticks(147)
ret = main_ticks(141)
assert_equal FunctionReturn , ret.class
link = @interpreter.get_register( ret.register )
assert_equal Fixnum , link.class
end
def test_sys
sys = main_ticks(152)
sys = main_ticks(145)
assert_equal Syscall , sys.class
end
end

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@ -19,7 +19,7 @@ module Risc
@instruction_events << was
end
def length
45
38
end
def test_state_change
@interpreter.register_event :state_changed , self
@ -40,15 +40,13 @@ module Risc
def test_chain
#show_ticks # get output of what is
check_chain [Branch, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, Branch,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, RegToSlot,
SlotToReg, RegToSlot, LoadConstant, RegToSlot, FunctionCall,
LoadConstant, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, Branch, FunctionReturn,
Transfer, SlotToReg, SlotToReg, Branch, Syscall,
NilClass]
LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, SlotToReg, Branch,
RegToSlot, LoadConstant, RegToSlot, FunctionCall, LoadConstant,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, Branch, FunctionReturn, Transfer,
SlotToReg, SlotToReg, Syscall, NilClass]
assert_equal Fixnum , get_return.class
assert_equal 5 , get_return
end

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@ -14,8 +14,7 @@ module Risc
check_main_chain [LoadConstant, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, Branch, FunctionReturn,
Transfer, SlotToReg, SlotToReg, Branch, Syscall,
NilClass]
Transfer, SlotToReg, SlotToReg, Syscall, NilClass]
assert_equal 5 , get_return
end

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@ -12,14 +12,14 @@ module Risc
def test_while
#show_main_ticks # get output of what is in main
check_main_chain [LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
LoadConstant, OperatorInstruction, IsZero, LoadConstant, OperatorInstruction,
LoadConstant, OperatorInstruction, IsZero, LoadConstant, OperatorInstruction, # 10
IsZero, LoadConstant, SlotToReg, Branch, RegToSlot,
Branch, SlotToReg, SlotToReg, LoadConstant, OperatorInstruction,
Branch, SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, # 20
IsZero, SlotToReg, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, # 30
RegToSlot, RegToSlot, Branch, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, Transfer, SlotToReg, SlotToReg,
Branch, Syscall, NilClass]
SlotToReg, FunctionReturn, Transfer, SlotToReg, SlotToReg, # 40
Syscall, NilClass, ]
assert_kind_of Parfait::NilClass , get_return
end
def test_load_false_const
@ -56,7 +56,7 @@ module Risc
assert check.label.name.start_with?("merge_label") , check.label.name
end
def test_exit
done = main_ticks(42)
done = main_ticks(41)
assert_equal Syscall , done.class
end
end

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@ -54,7 +54,7 @@ module Risc
end
def test_pc1
@interpreter.tick
assert_equal 25656 , @interpreter.pc
assert_equal 26136 , @interpreter.pc
end
def test_tick2
@interpreter.tick
@ -68,7 +68,7 @@ module Risc
def test_pc2
@interpreter.tick
@interpreter.tick
assert_equal 25660 , @interpreter.pc
assert_equal 26140 , @interpreter.pc
end
def test_tick_14_jump
14.times {@interpreter.tick}

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@ -25,7 +25,7 @@ module Risc
assert_equal 0 , Position.get(@linker.cpu_init).at
end
def test_cpu_at
assert_equal "0x72ec" , Position.get(@linker.cpu_init.first).to_s
assert_equal "0x74cc" , Position.get(@linker.cpu_init.first).to_s
end
def test_cpu_label
assert_equal Position , Position.get(@linker.cpu_init.first).class
@ -35,7 +35,7 @@ module Risc
assert 0 != bin.get_word(Parfait::BinaryCode.data_length) , "index 0 is 0 #{bin.inspect}"
end
def test_second_binary_first
bin = Parfait.object_space.get_init.binary.next
bin = Parfait.object_space.get_init.binary.next_code
assert 0 != bin.get_word(0) , "index 0 is 0 #{bin.inspect}"
end
def test_positions_set