remove arm as it is in own rep now
This commit is contained in:
Torsten Ruger
parent
1e866ae0ae
commit
84d27ce9d9
@ -1,104 +0,0 @@
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require "vm/register_machine"
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require_relative "stack_instruction"
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require_relative "logic_instruction"
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require_relative "move_instruction"
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require_relative "compare_instruction"
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require_relative "memory_instruction"
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require_relative "call_instruction"
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require_relative "constants"
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module Arm
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class ArmMachine < Vm::RegisterMachine
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# The constants are here for readablility, the code uses access functions below
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RETURN_REG = :r0
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TYPE_REG = :r1
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RECEIVER_REG = :r2
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SYSCALL_REG = :r7
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def return_register
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RETURN_REG
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end
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def type_register
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TYPE_REG
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end
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def receiver_register
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RECEIVER_REG
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end
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def function_call into , call
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raise "Not CallSite #{call.inspect}" unless call.is_a? Vm::CallSite
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raise "Not linked #{call.inspect}" unless call.function
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into.add_code call( call.function )
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raise "No return type for #{call.function.name}" unless call.function.return_type
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call.function.return_type
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end
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def main_start context
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entry = Vm::Block.new("main_entry",nil,nil)
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entry.add_code mov( :fp , 0 )
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entry.add_code call( context.function )
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entry
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end
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def main_exit context
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exit = Vm::Block.new("main_exit",nil,nil)
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syscall(exit , 1)
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exit
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end
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def function_entry block, f_name
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block.add_code push( [:lr] )
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block
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end
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def function_exit entry , f_name
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entry.add_code pop( [:pc] )
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entry
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end
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# assumes string in standard receiver reg (r2) and moves them down for the syscall
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def write_stdout function #, string
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# TODO save and restore r0
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function.mov( :r0 , 1 ) # 1 == stdout
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function.mov( :r1 , receiver_register )
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function.mov( receiver_register , :r3 )
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syscall( function.insertion_point , 4 ) # 4 == write
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end
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# stop, do not return
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def exit function #, string
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syscall( function.insertion_point , 1 ) # 1 == exit
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end
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# the number (a Vm::integer) is (itself) divided by 10, ie overwritten by the result
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# and the remainder is overwritten (ie an out argument)
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# not really a function, more a macro,
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def div10 function, number , remainder
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# Note about division: devision is MUCH more expensive than one would have thought
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# And coding it is a bit of a mind leap: it's all about finding a a result that gets the
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# remainder smaller than an int. i'll post some links sometime. This is from the arm manual
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tmp = function.new_local
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function.instance_eval do
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sub( remainder , number , 10 )
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sub( number , number , number , shift_lsr: 2)
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add( number , number , number , shift_lsr: 4)
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add( number , number , number , shift_lsr: 8)
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add( number , number , number , shift_lsr: 16)
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mov( number , number , shift_lsr: 3)
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add( tmp , number , number , shift_lsl: 2)
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sub( remainder , remainder , tmp , shift_lsl: 1 , update_status: 1)
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add( number , number, 1 , condition_code: :pl )
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add( remainder , remainder , 10 , condition_code: :mi )
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end
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end
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def syscall block , num
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# This is very arm specific, syscall number is passed in r7, other arguments like a c call ie 0 and up
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sys = Vm::Integer.new( Vm::RegisterReference.new(SYSCALL_REG) )
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ret = Vm::Integer.new( Vm::RegisterReference.new(RETURN_REG) )
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block.add_code mov( sys , num )
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block.add_code swi( 0 )
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#todo should write type into r1 according to syscall
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ret
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end
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end
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end
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@ -1,99 +0,0 @@
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require 'arm/nodes'
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require 'vm/block'
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require 'stream_reader'
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require 'stringio'
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require "arm/string_literal"
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module Arm
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# Assembler is the the top-level of the code hierachy, except it is not derived from code
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# instead a Assembler is a list of blocks (and string constants)
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# All code is created in blocks (see there) and there are two styles for that, for forward of backward
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# referencing. Read function block and add_block and Block.set
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class Assembler
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def initialize
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@blocks = []
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@string_table = {}
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end
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attr_reader :blocks
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# Assembling to string will return a binary string of the whole program, ie all blocks and the
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# strings they use
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# As a memory reference this would be callable, but more likely you will hand it over to
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# an ObjectWriter as the .text section and then link it. And then execute it :-)
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def assemble_to_string
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#put the strings at the end of the assembled code.
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# adding them will fix their position and make them assemble after
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@string_table.values.each do |data|
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add_block data
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end
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io = StringIO.new
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assemble(io)
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io.string
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end
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# Add a string to the string table. Strings are global and constant. So only one copy of each
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# string exists
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# Internally StringConstants are created and stored and during assembly written after the blocks
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def add_string str
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code = @string_table[str]
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return code if code
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data = Vm::StringConstant.new(str)
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@string_table[str] = data
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end
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# Length of all blocks. Does not take strings into account as they are added after all blocks.
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# This is used to determine where a block when it is added after creation (see add_block)
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def length
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@blocks.inject(0) {| sum , item | sum + item.length}
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end
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# This is how you add a forward declared block. This is called automatically when you
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# call block with ruby block, but has to be done manually if not
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def add_block block
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block.at self.length
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@blocks << block
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end
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# return the block of the given name
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# or raise an exception, as this is meant to be called when the block is available
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def get_block name
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name = name.to_sym
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block = @blocks.find {|b| b.name == name}
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raise "No block found for #{name} (in #{blocks.collect{|b|b.name}.join(':')})" unless block
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block
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end
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# this is used to create blocks.
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# All functions that have no args are interpreted as block names
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# and if a block is provided, it is evaluated in the (ruby)blocks scope and the block added to the
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# program immediately.
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# If no block is provided (forward declaration), you must call code on it later
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def method_missing(meth, *args, &block)
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if args.length == 0
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code = Block.new(meth.to_s , self )
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if block_given?
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add_block code
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code.instance_eval(&block)
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end
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return code
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else
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super
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end
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end
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private
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def assemble(io)
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@blocks.each do |obj|
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obj.assemble io
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end
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end
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end
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end
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@ -1,69 +0,0 @@
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require_relative "nodes"
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module Arm
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# There are only three call instructions in arm branch (b), call (bl) and syscall (swi)
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# A branch could be called a jump as it has no notion of returning
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# The pc is put into the link register to make a return possible
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# a return is affected by moving the stored link register into the pc, effectively a branch
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# swi (SoftWareInterrupt) or system call is how we call the kernel.
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# in Arm the register layout is different and so we have to place the syscall code into register 7
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# Registers 0-6 hold the call values as for a normal c call
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class CallInstruction < Vm::CallInstruction
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include Arm::Constants
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# arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
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def length
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4
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end
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def initialize(first, attributes)
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super(first , attributes)
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@attributes[:update_status] = 0
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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end
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def assemble(io)
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case @attributes[:opcode]
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when :b, :call
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arg = @first
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#puts "BLAB #{arg.inspect}"
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if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
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arg = Vm::IntegerConstant.new( arg )
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end
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if arg.is_a?(Vm::Block) or arg.is_a?(Vm::Function)
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diff = arg.position - self.position - 8
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arg = Vm::IntegerConstant.new(diff)
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end
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if (arg.is_a?(Vm::IntegerConstant))
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jmp_val = arg.integer >> 2
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packed = [jmp_val].pack('l')
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# signed 32-bit, condense to 24-bit
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# TODO add check that the value fits into 24 bits
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io << packed[0,3]
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else
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raise "else not coded arg =#{arg}: #{inspect}"
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end
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io.write_uint8 op_bit_code | (COND_CODES[@attributes[:condition_code]] << 4)
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when :swi
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arg = @first
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if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
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arg = Vm::IntegerConstant.new( arg )
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end
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if (arg.is_a?(Vm::IntegerConstant))
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packed = [arg.integer].pack('L')[0,3]
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io << packed
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io.write_uint8 0b1111 | (COND_CODES[@attributes[:condition_code]] << 4)
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else
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raise "invalid operand argument expected literal not #{arg} #{inspect}"
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end
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else
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raise "Should not be the case #{inspect}"
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end
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end
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end#class
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end
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@ -1,95 +0,0 @@
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module Arm
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class CompareInstruction < Vm::CompareInstruction
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include Arm::Constants
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def initialize(left , right , attributes)
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super(left , right, attributes)
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@operand = 0
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@immediate = 0
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@attributes[:update_status] = 1
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@rn = left
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@rd = :r0
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end
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# arm instructions are pretty sensible, and always 4 bytes (thumb not supported)
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def length
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4
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end
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def assemble(io)
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# don't overwrite instance variables, to make assembly repeatable
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rn = @rn
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operand = @operand
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immediate = @immediate
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arg = @right
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if arg.is_a?(Vm::ObjectConstant)
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# do pc relative addressing with the difference to the instuction
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# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
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arg = Vm::IntegerConstant.new( arg.position - self.position - 8 )
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rn = :pc
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end
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if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
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arg = Vm::IntegerConstant.new( arg )
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end
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if (arg.is_a?(Vm::IntegerConstant))
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if (arg.integer.fits_u8?)
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# no shifting needed
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operand = arg.integer
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immediate = 1
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elsif (op_with_rot = calculate_u8_with_rr(arg))
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operand = op_with_rot
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immediate = 1
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raise "hmm"
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else
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raise "cannot fit numeric literal argument in operand #{arg.inspect}"
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end
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elsif (arg.is_a?(Symbol) or arg.is_a?(Vm::Integer))
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operand = arg
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immediate = 0
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elsif (arg.is_a?(Arm::Shift))
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rm_ref = arg.argument
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immediate = 0
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shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
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'ror' => 0b110, 'rrx' => 0b110}[arg.type]
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if (arg.type == 'ror' and arg.value.nil?)
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# ror #0 == rrx
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raise "cannot rotate by zero #{arg} #{inspect}"
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end
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arg1 = arg.value
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if (arg1.is_a?(Vm::IntegerConstant))
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if (arg1.value >= 32)
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raise "cannot shift by more than 31 #{arg1} #{inspect}"
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end
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shift_imm = arg1.value
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elsif (arg1.is_a?(Arm::Register))
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shift_op val |= 0x1;
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shift_imm = arg1.number << 1
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elsif (arg.type == 'rrx')
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shift_imm = 0
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end
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operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
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else
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raise "invalid operand argument #{arg.inspect} , #{inspect}"
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end
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instuction_class = 0b00 # OPC_DATA_PROCESSING
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val = (operand.is_a?(Symbol) or operand.is_a?(Vm::Integer)) ? reg_code(operand) : operand
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val = 0 if val == nil
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val = shift(val , 0)
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raise inspect unless reg_code(@rd)
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val |= shift(reg_code(@rd) , 12)
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val |= shift(reg_code(rn) , 12+4)
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val |= shift(@attributes[:update_status] , 12+4+4)#20
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val |= shift(op_bit_code , 12+4+4 +1)
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val |= shift(immediate , 12+4+4 +1+4)
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val |= shift(instuction_class , 12+4+4 +1+4+1)
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val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
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io.write_uint32 val
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end
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def shift val , by
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raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
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val << by
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end
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end
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end
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@ -1,117 +0,0 @@
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module Arm
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module Constants
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OPCODES = {
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:adc => 0b0101, :add => 0b0100,
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:and => 0b0000, :bic => 0b1110,
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:eor => 0b0001, :orr => 0b1100,
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:rsb => 0b0011, :rsc => 0b0111,
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:sbc => 0b0110, :sub => 0b0010,
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# for these Rn is sbz (should be zero)
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:mov => 0b1101,
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:mvn => 0b1111,
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# for these Rd is sbz and S=1
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:cmn => 0b1011,
|
|
||||||
:cmp => 0b1010,
|
|
||||||
:teq => 0b1001,
|
|
||||||
:tst => 0b1000,
|
|
||||||
|
|
||||||
:b => 0b1010,
|
|
||||||
:call=> 0b1011
|
|
||||||
}
|
|
||||||
#return the bit patter that the cpu uses for the current instruction @attributes[:opcode]
|
|
||||||
def op_bit_code
|
|
||||||
bit_code = OPCODES[opcode]
|
|
||||||
bit_code or raise "no code found for #{opcode} #{inspect}"
|
|
||||||
end
|
|
||||||
|
|
||||||
#codition codes can be applied to many instructions and thus save branches
|
|
||||||
# :al => always , :eq => equal and so on
|
|
||||||
# eq mov if equal :moveq r1 r2 (also exists as function) will only execute if the last operation was 0
|
|
||||||
COND_CODES = {
|
|
||||||
:al => 0b1110, :eq => 0b0000,
|
|
||||||
:ne => 0b0001, :cs => 0b0010,
|
|
||||||
:mi => 0b0100, :hi => 0b1000,
|
|
||||||
:cc => 0b0011, :pl => 0b0101,
|
|
||||||
:ls => 0b1001, :vc => 0b0111,
|
|
||||||
:lt => 0b1011, :le => 0b1101,
|
|
||||||
:ge => 0b1010, :gt => 0b1100,
|
|
||||||
:vs => 0b0110
|
|
||||||
}
|
|
||||||
#return the bit pattern for the @attributes[:condition_code] variable, which signals the conditional code
|
|
||||||
def cond_bit_code
|
|
||||||
COND_CODES[@attributes[:condition_code]] or throw "no code found for #{@attributes[:condition_code]}"
|
|
||||||
end
|
|
||||||
|
|
||||||
REGISTERS = { 'r0' => 0, 'r1' => 1, 'r2' => 2, 'r3' => 3, 'r4' => 4, 'r5' => 5,
|
|
||||||
'r6' => 6, 'r7' => 7, 'r8' => 8, 'r9' => 9, 'r10' => 10, 'r11' => 11,
|
|
||||||
'r12' => 12, 'r13' => 13, 'r14' => 14, 'r15' => 15, 'a1' => 0, 'a2' => 1,
|
|
||||||
'a3' => 2, 'a4' => 3, 'v1' => 4, 'v2' => 5, 'v3' => 6, 'v4' => 7, 'v5' => 8,
|
|
||||||
'v6' => 9, 'rfp' => 9, 'sl' => 10, 'fp' => 11, 'ip' => 12, 'sp' => 13,
|
|
||||||
'lr' => 14, 'pc' => 15 }
|
|
||||||
def reg r_name
|
|
||||||
code = reg_code r_name
|
|
||||||
raise "no such register #{r_name}" unless code
|
|
||||||
Arm::Register.new(r_name.to_sym , code )
|
|
||||||
end
|
|
||||||
def reg_code r_name
|
|
||||||
raise "double r #{r_name}" if( :rr1 == r_name)
|
|
||||||
if r_name.is_a? Vm::Word
|
|
||||||
r_name = r_name.register_symbol
|
|
||||||
end
|
|
||||||
if r_name.is_a? Fixnum
|
|
||||||
r_name = "r#{r_name}"
|
|
||||||
end
|
|
||||||
r = REGISTERS[r_name.to_s]
|
|
||||||
raise "no reg #{r_name}" if r == nil
|
|
||||||
r
|
|
||||||
end
|
|
||||||
|
|
||||||
def calculate_u8_with_rr(arg)
|
|
||||||
parts = arg.value.to_s(2).rjust(32,'0').scan(/^(0*)(.+?)0*$/).flatten
|
|
||||||
pre_zeros = parts[0].length
|
|
||||||
imm_len = parts[1].length
|
|
||||||
if ((pre_zeros+imm_len) % 2 == 1)
|
|
||||||
u8_imm = (parts[1]+'0').to_i(2)
|
|
||||||
imm_len += 1
|
|
||||||
else
|
|
||||||
u8_imm = parts[1].to_i(2)
|
|
||||||
end
|
|
||||||
if (u8_imm.fits_u8?)
|
|
||||||
# can do!
|
|
||||||
rot_imm = (pre_zeros+imm_len) / 2
|
|
||||||
if (rot_imm > 15)
|
|
||||||
return nil
|
|
||||||
end
|
|
||||||
return u8_imm | (rot_imm << 8)
|
|
||||||
else
|
|
||||||
return nil
|
|
||||||
end
|
|
||||||
end
|
|
||||||
|
|
||||||
#slighly wrong place for this code, but since the module gets included in instructions anyway . . .
|
|
||||||
# implement the barrel shifter on the operand (which is set up before as an integer)
|
|
||||||
def shift_handling
|
|
||||||
op = 0
|
|
||||||
#codes that one can shift, first two probably most common.
|
|
||||||
# l (in lsr) means logical, ie unsigned, a (in asr) is arithmetic, ie signed
|
|
||||||
{'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100, 'ror' => 0b110, 'rrx' => 0b110}.each do |short, bin|
|
|
||||||
long = "shift_#{short}".to_sym
|
|
||||||
if shif = @attributes[long]
|
|
||||||
shif = shif.integer if (shif.is_a?(Vm::IntegerConstant))
|
|
||||||
if (shif.is_a?(Vm::Integer))
|
|
||||||
raise "should not be supported, check code #{inspect}"
|
|
||||||
bin |= 0x1;
|
|
||||||
shift = shif.register << 1
|
|
||||||
end
|
|
||||||
raise "0 < shift <= 32 #{shif} #{inspect}" if (shif >= 32) or( shif < 0)
|
|
||||||
op |= shift(bin , 4 )
|
|
||||||
op |= shift(shif , 4+3)
|
|
||||||
break
|
|
||||||
end
|
|
||||||
end
|
|
||||||
return op
|
|
||||||
end
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,74 +0,0 @@
|
|||||||
module Arm
|
|
||||||
|
|
||||||
class LogicInstruction < Vm::LogicInstruction
|
|
||||||
include Arm::Constants
|
|
||||||
|
|
||||||
def initialize(result , left , right , attributes = {})
|
|
||||||
super(result ,left , right , attributes)
|
|
||||||
@attributes[:update_status] = 0 if @attributes[:update_status] == nil
|
|
||||||
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
|
|
||||||
@operand = 0
|
|
||||||
|
|
||||||
raise "Left arg must be given #{inspect}" unless @left
|
|
||||||
@immediate = 0
|
|
||||||
end
|
|
||||||
|
|
||||||
# arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
|
|
||||||
def length
|
|
||||||
4
|
|
||||||
end
|
|
||||||
|
|
||||||
def assemble(io)
|
|
||||||
# don't overwrite instance variables, to make assembly repeatable
|
|
||||||
left = @left
|
|
||||||
operand = @operand
|
|
||||||
immediate = @immediate
|
|
||||||
|
|
||||||
right = @right
|
|
||||||
if @left.is_a?(Vm::ObjectConstant)
|
|
||||||
# do pc relative addressing with the difference to the instuction
|
|
||||||
# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
|
|
||||||
right = @left.position - self.position - 8
|
|
||||||
left = :pc
|
|
||||||
end
|
|
||||||
# automatic wrapping, for machine internal code and testing
|
|
||||||
if( right.is_a? Fixnum )
|
|
||||||
right = Vm::IntegerConstant.new( right )
|
|
||||||
end
|
|
||||||
if (right.is_a?(Vm::IntegerConstant))
|
|
||||||
if true #TODO (right.integer.fits_u8?)
|
|
||||||
# no shifting needed
|
|
||||||
operand = right.integer
|
|
||||||
immediate = 1
|
|
||||||
elsif (op_with_rot = calculate_u8_with_rr(right))
|
|
||||||
operand = op_with_rot
|
|
||||||
immediate = 1
|
|
||||||
# raise "hmm"
|
|
||||||
else
|
|
||||||
raise "cannot fit numeric literal argument in operand #{right.inspect}"
|
|
||||||
end
|
|
||||||
elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer))
|
|
||||||
operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
|
|
||||||
immediate = 0 # ie not immediate is register
|
|
||||||
else
|
|
||||||
raise "invalid operand argument #{right.inspect} , #{inspect}"
|
|
||||||
end
|
|
||||||
op = shift_handling
|
|
||||||
instuction_class = 0b00 # OPC_DATA_PROCESSING
|
|
||||||
val = shift(operand , 0)
|
|
||||||
val |= shift(op , 0) # any barral action, is already shifted
|
|
||||||
val |= shift(reg_code(@result) , 12)
|
|
||||||
val |= shift(reg_code(left) , 12+4)
|
|
||||||
val |= shift(@attributes[:update_status] , 12+4+4)#20
|
|
||||||
val |= shift(op_bit_code , 12+4+4 +1)
|
|
||||||
val |= shift(immediate , 12+4+4 +1+4)
|
|
||||||
val |= shift(instuction_class , 12+4+4 +1+4+1)
|
|
||||||
val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
|
|
||||||
io.write_uint32 val
|
|
||||||
end
|
|
||||||
def shift val , by
|
|
||||||
raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
|
|
||||||
val << by
|
|
||||||
end
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,108 +0,0 @@
|
|||||||
require_relative "nodes"
|
|
||||||
|
|
||||||
module Arm
|
|
||||||
# ADDRESSING MODE 2
|
|
||||||
# Implemented: immediate offset with offset=0
|
|
||||||
class MemoryInstruction < Vm::MemoryInstruction
|
|
||||||
include Arm::Constants
|
|
||||||
|
|
||||||
def initialize(result , left , right = nil , attributes = {})
|
|
||||||
super(result , left , right , attributes)
|
|
||||||
@attributes[:update_status] = 0 if @attributes[:update_status] == nil
|
|
||||||
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
|
|
||||||
@operand = 0
|
|
||||||
raise "alert" if right.is_a? Vm::Block
|
|
||||||
@pre_post_index = 0 #P flag
|
|
||||||
@add_offset = 0 #U flag
|
|
||||||
@is_load = opcode.to_s[0] == "l" ? 1 : 0 #L (load) flag
|
|
||||||
end
|
|
||||||
|
|
||||||
# arm intructions are pretty sensible, and always 4 bytes (thumb not supported)
|
|
||||||
def length
|
|
||||||
4
|
|
||||||
end
|
|
||||||
|
|
||||||
def assemble(io)
|
|
||||||
# don't overwrite instance variables, to make assembly repeatable
|
|
||||||
rn = @rn
|
|
||||||
operand = @operand
|
|
||||||
add_offset = @add_offset
|
|
||||||
|
|
||||||
arg = @left
|
|
||||||
arg = arg.register_symbol if( arg.is_a? Vm::Word )
|
|
||||||
#str / ldr are _serious instructions. With BIG possibilities not half are implemented
|
|
||||||
if (arg.is_a?(Symbol)) #symbol is register
|
|
||||||
rn = arg
|
|
||||||
if @right
|
|
||||||
operand = @right
|
|
||||||
#TODO better test, this operand integer (register) does not work. but sleep first
|
|
||||||
operand = operand.register_symbol if operand.is_a? Vm::Integer
|
|
||||||
unless( operand.is_a? Symbol)
|
|
||||||
puts "operand #{operand.inspect}"
|
|
||||||
if (operand < 0)
|
|
||||||
add_offset = 0
|
|
||||||
#TODO test/check/understand
|
|
||||||
operand *= -1
|
|
||||||
else
|
|
||||||
add_offset = 1
|
|
||||||
end
|
|
||||||
if (@operand.abs > 4095)
|
|
||||||
raise "reference offset too large/small (max 4095) #{arg} #{inspect}"
|
|
||||||
end
|
|
||||||
end
|
|
||||||
end
|
|
||||||
elsif (arg.is_a?(Vm::ObjectConstant) ) #use pc relative
|
|
||||||
rn = :pc
|
|
||||||
operand = arg.position - self.position - 8 #stringtable is after code
|
|
||||||
add_offset = 1
|
|
||||||
if (operand.abs > 4095)
|
|
||||||
raise "reference offset too large/small (max 4095) #{arg} #{inspect}"
|
|
||||||
end
|
|
||||||
elsif( arg.is_a?(Vm::IntegerConstant) )
|
|
||||||
#TODO untested brach, probably not working
|
|
||||||
raise "is this working ?? #{arg} #{inspect}"
|
|
||||||
@pre_post_index = 1
|
|
||||||
@rn = pc
|
|
||||||
@use_addrtable_reloc = true
|
|
||||||
@addrtable_reloc_target = arg
|
|
||||||
else
|
|
||||||
raise "invalid operand argument #{arg.inspect} #{inspect}"
|
|
||||||
end
|
|
||||||
#not sure about these 2 constants. They produce the correct output for str r0 , r1
|
|
||||||
# but i can't help thinking that that is because they are not used in that instruction and
|
|
||||||
# so it doesn't matter. Will see
|
|
||||||
add_offset = 1
|
|
||||||
# TODO to be continued
|
|
||||||
add_offset = 0 if @attributes[:add_offset]
|
|
||||||
@pre_post_index = 1
|
|
||||||
@pre_post_index = 0 if @attributes[:flaggie]
|
|
||||||
w = 0 #W flag
|
|
||||||
byte_access = opcode.to_s[-1] == "b" ? 1 : 0 #B (byte) flag
|
|
||||||
instuction_class = 0b01 # OPC_MEMORY_ACCESS
|
|
||||||
if operand.is_a?(Symbol)
|
|
||||||
val = reg_code(operand)
|
|
||||||
@pre_post_index = 0
|
|
||||||
i = 1 # not quite sure about this, but it gives the output of as. read read read.
|
|
||||||
else
|
|
||||||
i = 0 #I flag (third bit)
|
|
||||||
val = operand
|
|
||||||
end
|
|
||||||
val = shift(val , 0 ) # for the test
|
|
||||||
val |= shift(reg_code(@result) , 12 )
|
|
||||||
val |= shift(reg_code(rn) , 12+4) #16
|
|
||||||
val |= shift(@is_load , 12+4 +4)
|
|
||||||
val |= shift(w , 12+4 +4+1)
|
|
||||||
val |= shift(byte_access , 12+4 +4+1+1)
|
|
||||||
val |= shift(add_offset , 12+4 +4+1+1+1)
|
|
||||||
val |= shift(@pre_post_index, 12+4 +4+1+1+1+1)#24
|
|
||||||
val |= shift(i , 12+4 +4+1+1+1+1 +1)
|
|
||||||
val |= shift(instuction_class,12+4 +4+1+1+1+1 +1+1)
|
|
||||||
val |= shift(cond_bit_code , 12+4 +4+1+1+1+1 +1+1+2)
|
|
||||||
io.write_uint32 val
|
|
||||||
end
|
|
||||||
def shift val , by
|
|
||||||
raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
|
|
||||||
val << by
|
|
||||||
end
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,79 +0,0 @@
|
|||||||
module Arm
|
|
||||||
|
|
||||||
class MoveInstruction < Vm::MoveInstruction
|
|
||||||
include Arm::Constants
|
|
||||||
|
|
||||||
def initialize(to , from , attributes)
|
|
||||||
super(to , from , attributes)
|
|
||||||
@attributes[:update_status] = 0 if @attributes[:update_status] == nil
|
|
||||||
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
|
|
||||||
@attributes[:opcode] = attributes[:opcode]
|
|
||||||
@operand = 0
|
|
||||||
|
|
||||||
@immediate = 0
|
|
||||||
@rn = :r0 # register zero = zero bit pattern
|
|
||||||
# NO-OP -> pass raise inspect if to.is_a?(Vm::Value) and
|
|
||||||
# from.is_a?(Vm::Value) and
|
|
||||||
# !@attributes[:shift_lsr] and
|
|
||||||
# to.register_symbol == from.register_symbol
|
|
||||||
raise "uups " if @to.register_symbol == :rr1
|
|
||||||
end
|
|
||||||
|
|
||||||
# arm intrucions are pretty sensible, and always 4 bytes (thumb not supported)
|
|
||||||
def length
|
|
||||||
4
|
|
||||||
end
|
|
||||||
|
|
||||||
def assemble(io)
|
|
||||||
# don't overwrite instance variables, to make assembly repeatable
|
|
||||||
rn = @rn
|
|
||||||
operand = @operand
|
|
||||||
immediate = @immediate
|
|
||||||
|
|
||||||
right = @from
|
|
||||||
if right.is_a?(Vm::ObjectConstant)
|
|
||||||
# do pc relative addressing with the difference to the instuction
|
|
||||||
# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
|
|
||||||
right = Vm::IntegerConstant.new( right.position - self.position - 8 )
|
|
||||||
rn = :pc
|
|
||||||
end
|
|
||||||
if( right.is_a? Fixnum )
|
|
||||||
right = Vm::IntegerConstant.new( right )
|
|
||||||
end
|
|
||||||
if (right.is_a?(Vm::IntegerConstant))
|
|
||||||
if (right.integer.fits_u8?)
|
|
||||||
# no shifting needed
|
|
||||||
operand = right.integer
|
|
||||||
immediate = 1
|
|
||||||
elsif (op_with_rot = calculate_u8_with_rr(right))
|
|
||||||
operand = op_with_rot
|
|
||||||
immediate = 1
|
|
||||||
raise "hmm"
|
|
||||||
else
|
|
||||||
raise "cannot fit numeric literal argument in operand #{right.inspect}"
|
|
||||||
end
|
|
||||||
elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer))
|
|
||||||
operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
|
|
||||||
immediate = 0 # ie not immediate is register
|
|
||||||
else
|
|
||||||
raise "invalid operand argument #{right.inspect} , #{inspect}"
|
|
||||||
end
|
|
||||||
op = shift_handling
|
|
||||||
instuction_class = 0b00 # OPC_DATA_PROCESSING
|
|
||||||
val = shift(operand , 0)
|
|
||||||
val |= shift(op , 0) # any barral action, is already shifted
|
|
||||||
val |= shift(reg_code(@to) , 12)
|
|
||||||
val |= shift(reg_code(rn) , 12+4)
|
|
||||||
val |= shift(@attributes[:update_status] , 12+4+4)#20
|
|
||||||
val |= shift(op_bit_code , 12+4+4 +1)
|
|
||||||
val |= shift(immediate , 12+4+4 +1+4)
|
|
||||||
val |= shift(instuction_class , 12+4+4 +1+4+1)
|
|
||||||
val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
|
|
||||||
io.write_uint32 val
|
|
||||||
end
|
|
||||||
def shift val , by
|
|
||||||
raise "Not integer #{val}:#{val.class} in #{inspect}" unless val.is_a? Fixnum
|
|
||||||
val << by
|
|
||||||
end
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,37 +0,0 @@
|
|||||||
module Arm
|
|
||||||
|
|
||||||
class Shift
|
|
||||||
attr_accessor :type, :value, :argument
|
|
||||||
end
|
|
||||||
|
|
||||||
# Registers have off course a name (r1-16 for arm)
|
|
||||||
# but also refer to an address. In other words they can be an operand for instructions.
|
|
||||||
# Arm has addressing modes abound, and so can add to a register before actually using it
|
|
||||||
# If can actually shift or indeed shift what it adds, but not implemented
|
|
||||||
class Register
|
|
||||||
attr_accessor :name , :offset , :bits
|
|
||||||
def initialize name , bits
|
|
||||||
@name = name
|
|
||||||
@bits = bits
|
|
||||||
@offset = 0
|
|
||||||
end
|
|
||||||
|
|
||||||
# this is for the dsl, so we can write pretty code like r1 + 4
|
|
||||||
# when we want to access the next word (4) after r1
|
|
||||||
def + number
|
|
||||||
@offset = number
|
|
||||||
self
|
|
||||||
end
|
|
||||||
end
|
|
||||||
|
|
||||||
# maybe not used at all as code_gen::instruction raises if used.
|
|
||||||
# instead now using Arrays
|
|
||||||
class RegisterList
|
|
||||||
attr_accessor :registers
|
|
||||||
def initialize regs
|
|
||||||
@registers = regs
|
|
||||||
regs.each{ |reg| raise "not a reg #{sym} , #{reg}" unless reg.is_a?(Arm::Register) }
|
|
||||||
end
|
|
||||||
end
|
|
||||||
|
|
||||||
end
|
|
||||||
@ -1,66 +0,0 @@
|
|||||||
require "vm/instruction"
|
|
||||||
require_relative "constants"
|
|
||||||
|
|
||||||
module Arm
|
|
||||||
# ADDRESSING MODE 4
|
|
||||||
class StackInstruction < Vm::StackInstruction
|
|
||||||
include Arm::Constants
|
|
||||||
|
|
||||||
# arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
|
|
||||||
def length
|
|
||||||
4
|
|
||||||
end
|
|
||||||
|
|
||||||
def initialize(first , attributes)
|
|
||||||
super(first , attributes)
|
|
||||||
@attributes[:update_status] = 0 if @attributes[:update_status] == nil
|
|
||||||
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
|
|
||||||
@attributes[:opcode] = attributes[:opcode]
|
|
||||||
@operand = 0
|
|
||||||
|
|
||||||
@attributes[:update_status]= 0
|
|
||||||
@rn = :r0 # register zero = zero bit pattern
|
|
||||||
# downward growing, decrement before memory access
|
|
||||||
# official ARM style stack as used by gas
|
|
||||||
end
|
|
||||||
|
|
||||||
def assemble(io)
|
|
||||||
# don't overwrite instance variables, to make assembly repeatable
|
|
||||||
operand = @operand
|
|
||||||
|
|
||||||
if (@first.is_a?(Array))
|
|
||||||
operand = 0
|
|
||||||
@first.each do |r|
|
|
||||||
raise "nil register in push, index #{r}- #{inspect}" if r.nil?
|
|
||||||
operand |= (1 << reg_code(r))
|
|
||||||
end
|
|
||||||
else
|
|
||||||
raise "invalid operand argument #{inspect}"
|
|
||||||
end
|
|
||||||
write_base = 1
|
|
||||||
if (opcode == :push)
|
|
||||||
pre_post_index = 1
|
|
||||||
up_down = 0
|
|
||||||
is_pop = 0
|
|
||||||
else #pop
|
|
||||||
pre_post_index = 0
|
|
||||||
up_down = 1
|
|
||||||
is_pop = 1
|
|
||||||
end
|
|
||||||
instuction_class = 0b10 # OPC_STACK
|
|
||||||
cond = @attributes[:condition_code].is_a?(Symbol) ? COND_CODES[@attributes[:condition_code]] : @attributes[:condition_code]
|
|
||||||
@rn = :sp # sp register
|
|
||||||
#assemble of old
|
|
||||||
val = operand
|
|
||||||
val |= (reg_code(@rn) << 16)
|
|
||||||
val |= (is_pop << 16+4) #20
|
|
||||||
val |= (write_base << 16+4+ 1)
|
|
||||||
val |= (@attributes[:update_status] << 16+4+ 1+1)
|
|
||||||
val |= (up_down << 16+4+ 1+1+1)
|
|
||||||
val |= (pre_post_index << 16+4+ 1+1+1+1)#24
|
|
||||||
val |= (instuction_class << 16+4+ 1+1+1+1 +2)
|
|
||||||
val |= (cond << 16+4+ 1+1+1+1 +2+2)
|
|
||||||
io.write_uint32 val
|
|
||||||
end
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,29 +0,0 @@
|
|||||||
require_relative '../helper'
|
|
||||||
|
|
||||||
# try to test that the generation of basic instructions works
|
|
||||||
# one instruction at a time, reverse testing from objdump --demangle -Sfghxp
|
|
||||||
# tests are named as per assembler code, ie test_mov testing mov instruction
|
|
||||||
# adc add and bic eor orr rsb rsc sbc sub mov mvn cmn cmp teq tst b call bx swi strb
|
|
||||||
|
|
||||||
module ArmHelper
|
|
||||||
# need Assembler and a block (see those classes)
|
|
||||||
def setup
|
|
||||||
@machine = Arm::ArmMachine.new
|
|
||||||
end
|
|
||||||
|
|
||||||
# code is what the generator spits out, at least one instruction worth (.first)
|
|
||||||
# the op code is wat was witten as assembler in the first place and the binary result
|
|
||||||
# is reversed and in 4 bytes as ruby can only do 31 bits and so we can't test with just one int (?)
|
|
||||||
def assert_code code , op , should
|
|
||||||
assert_equal op , code.opcode
|
|
||||||
io = StringIO.new
|
|
||||||
code.assemble(io)
|
|
||||||
binary = io.string
|
|
||||||
assert_equal 4 , binary.length , "code length wrong for #{code.inspect}"
|
|
||||||
index = 0
|
|
||||||
binary.each_byte do |byte |
|
|
||||||
assert_equal should[index] , byte , "byte #{index} 0x#{should[index].to_s(16)} != 0x#{byte.to_s(16)}"
|
|
||||||
index += 1
|
|
||||||
end
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,6 +0,0 @@
|
|||||||
require_relative "test_stack"
|
|
||||||
require_relative "test_control"
|
|
||||||
require_relative "test_logic"
|
|
||||||
require_relative "test_move"
|
|
||||||
require_relative "test_memory"
|
|
||||||
require_relative "test_compare"
|
|
||||||
@ -1,22 +0,0 @@
|
|||||||
require_relative 'helper'
|
|
||||||
|
|
||||||
class TestArmAsm < MiniTest::Test
|
|
||||||
include ArmHelper
|
|
||||||
|
|
||||||
def test_cmn
|
|
||||||
code = @machine.cmn :r1 , :r2
|
|
||||||
assert_code code , :cmn , [0x02,0x00,0x71,0xe1] #e1 71 00 02
|
|
||||||
end
|
|
||||||
def test_cmp
|
|
||||||
code = @machine.cmp :r1 , :r2
|
|
||||||
assert_code code , :cmp , [0x02,0x00,0x51,0xe1] #e1 51 00 02
|
|
||||||
end
|
|
||||||
def test_teq
|
|
||||||
code = @machine.teq :r1 , :r2
|
|
||||||
assert_code code , :teq , [0x02,0x00,0x31,0xe1] #e1 31 00 02
|
|
||||||
end
|
|
||||||
def test_tst
|
|
||||||
code = @machine.tst :r1 , :r2
|
|
||||||
assert_code code , :tst , [0x02,0x00,0x11,0xe1] #e1 11 00 02
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,21 +0,0 @@
|
|||||||
require_relative 'helper'
|
|
||||||
|
|
||||||
class TestControl < MiniTest::Test
|
|
||||||
include ArmHelper
|
|
||||||
|
|
||||||
def test_b
|
|
||||||
# the address is what an assembler calculates (a signed number for the amount of instructions),
|
|
||||||
# ie the relative (to pc) address -8 (pipeline) /4 so save space
|
|
||||||
# so the cpu adds the value*4 and starts loading that (load, decode, execute)
|
|
||||||
code = @machine.b -4 #this jumps to the next instruction
|
|
||||||
assert_code code , :b , [0xff,0xff,0xff,0xea] #ea ff ff fe
|
|
||||||
end
|
|
||||||
def test_call #see comment above. bx not implemented (as it means into thumb, and no thumb here)
|
|
||||||
code = @machine.call -4 ,{} #this jumps to the next instruction
|
|
||||||
assert_code code , :call, [0xff,0xff,0xff,0xeb] #ea ff ff fe
|
|
||||||
end
|
|
||||||
def test_swi
|
|
||||||
code = @machine.swi 0x05
|
|
||||||
assert_code code , :swi , [0x05,0x00,0x00,0xef]#ef 00 00 05
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,54 +0,0 @@
|
|||||||
require_relative 'helper'
|
|
||||||
|
|
||||||
class TestLogic < MiniTest::Test
|
|
||||||
include ArmHelper
|
|
||||||
|
|
||||||
def test_adc
|
|
||||||
code = @machine.adc :r1, :r3, :r5
|
|
||||||
assert_code code , :adc , [0x05,0x10,0xa3,0xe0] #e0 a3 10 05
|
|
||||||
end
|
|
||||||
def test_add
|
|
||||||
code = @machine.add :r1 , :r1, :r3
|
|
||||||
assert_code code , :add , [0x03,0x10,0x81,0xe0] #e0 81 10 03
|
|
||||||
end
|
|
||||||
def test_add_lst
|
|
||||||
code = @machine.add( :r1 , :r2 , :r3 , shift_lsr: 8)
|
|
||||||
assert_code code , :add , [0x23,0x14,0x82,0xe0] #e0 82 14 23
|
|
||||||
end
|
|
||||||
def test_and # inst eval doesn't really work with and
|
|
||||||
code = @machine.and( :r1 , :r2 , :r3)
|
|
||||||
assert_code code , :and , [0x03,0x10,0x02,0xe0] #e0 01 10 03
|
|
||||||
end
|
|
||||||
def test_bic
|
|
||||||
code = @machine.bic :r2 , :r2 , :r3
|
|
||||||
assert_code code , :bic , [0x03,0x20,0xc2,0xe1] #e3 c2 20 44
|
|
||||||
end
|
|
||||||
def test_eor
|
|
||||||
code = @machine.eor :r2 , :r2 , :r3
|
|
||||||
assert_code code , :eor , [0x03,0x20,0x22,0xe0] #e0 22 20 03
|
|
||||||
end
|
|
||||||
def test_rsb
|
|
||||||
code = @machine.rsb :r1 , :r2 , :r3
|
|
||||||
assert_code code , :rsb , [0x03,0x10,0x62,0xe0]#e0 62 10 03
|
|
||||||
end
|
|
||||||
def test_rsc
|
|
||||||
code = @machine.rsc :r2 , :r3 , :r4
|
|
||||||
assert_code code , :rsc , [0x04,0x20,0xe3,0xe0]#e0 e3 20 04
|
|
||||||
end
|
|
||||||
def test_sbc
|
|
||||||
code = @machine.sbc :r3, :r4 , :r5
|
|
||||||
assert_code code , :sbc , [0x05,0x30,0xc4,0xe0]#e0 c4 30 05
|
|
||||||
end
|
|
||||||
def test_sub
|
|
||||||
code = @machine.sub :r2, :r0, 1
|
|
||||||
assert_code code, :sub , [0x01,0x20,0x40,0xe2] #e2 40 20 01
|
|
||||||
end
|
|
||||||
def test_subs
|
|
||||||
code = @machine.sub :r2, :r2, 1 , update_status: 1
|
|
||||||
assert_code code, :sub , [0x01,0x20,0x52,0xe2] #e2 52 20 01
|
|
||||||
end
|
|
||||||
def test_orr
|
|
||||||
code = @machine.orr :r2 , :r2 , :r3
|
|
||||||
assert_code code , :orr , [0x03,0x20,0x82,0xe1] #e1 82 20 03
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,37 +0,0 @@
|
|||||||
require_relative 'helper'
|
|
||||||
|
|
||||||
class TestMemory < MiniTest::Test
|
|
||||||
include ArmHelper
|
|
||||||
|
|
||||||
def test_ldr
|
|
||||||
code = @machine.ldr :r0, :r0
|
|
||||||
assert_code code, :ldr , [0x00,0x00,0x90,0xe5] #e5 90 00 00
|
|
||||||
end
|
|
||||||
def test_ldr_const_offset
|
|
||||||
code = @machine.ldr :r0, :r0 , 4
|
|
||||||
assert_code code, :ldr , [0x04,0x00,0x90,0xe5] #e5 90 00 04
|
|
||||||
end
|
|
||||||
def test_ldr_reg_offset
|
|
||||||
code = @machine.ldr :r0, :r1 , :r2
|
|
||||||
assert_code code, :ldr , [0x02,0x00,0x91,0xe6] #e6 91 00 02
|
|
||||||
end
|
|
||||||
def test_ldrb
|
|
||||||
code = @machine.ldrb :r0, :r0
|
|
||||||
assert_code code, :ldrb , [0x00,0x00,0xd0,0xe5] #e5 d0 00 00
|
|
||||||
end
|
|
||||||
|
|
||||||
def test_str
|
|
||||||
code = @machine.str :r0, :r1
|
|
||||||
assert_code code, :str , [0x00,0x00,0x81,0xe5] #e5 81 00 00
|
|
||||||
end
|
|
||||||
|
|
||||||
def test_strb_add
|
|
||||||
code = @machine.strb :r0, :r1 , 1 , flaggie: 1
|
|
||||||
assert_code code, :strb , [0x01,0x00,0xc1,0xe4] #e4 c1 00 01
|
|
||||||
end
|
|
||||||
|
|
||||||
def test_strb
|
|
||||||
code = @machine.strb :r0, :r0
|
|
||||||
assert_code code, :strb , [0x00,0x00,0xc0,0xe5] #e5 c0 00 00
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,14 +0,0 @@
|
|||||||
require_relative 'helper'
|
|
||||||
|
|
||||||
class TestMoves < MiniTest::Test
|
|
||||||
include ArmHelper
|
|
||||||
|
|
||||||
def test_mov
|
|
||||||
code = @machine.mov :r0, 5
|
|
||||||
assert_code code , :mov , [0x05,0x00,0xa0,0xe3] #e3 a0 10 05
|
|
||||||
end
|
|
||||||
def test_mvn
|
|
||||||
code = @machine.mvn :r1, 5
|
|
||||||
assert_code code , :mvn , [0x05,0x10,0xe0,0xe3] #e3 e0 10 05
|
|
||||||
end
|
|
||||||
end
|
|
||||||
@ -1,31 +0,0 @@
|
|||||||
require_relative 'helper'
|
|
||||||
|
|
||||||
class TestStack < MiniTest::Test
|
|
||||||
include ArmHelper
|
|
||||||
|
|
||||||
def test_push
|
|
||||||
code = @machine.push [:lr]
|
|
||||||
assert_code code , :push , [0x00,0x40,0x2d,0xe9] #e9 2d 40 00
|
|
||||||
end
|
|
||||||
def test_push_three
|
|
||||||
code = @machine.push [:r0,:r1,:lr]
|
|
||||||
assert_code code , :push , [0x03,0x40,0x2d,0xe9] #e9 2d 40 03
|
|
||||||
end
|
|
||||||
def test_push_no_link
|
|
||||||
code = @machine.push [:r0,:r1,:r2 ,:r3,:r4,:r5]
|
|
||||||
assert_code code , :push , [0x3f,0x00,0x2d,0xe9] #e9 2d 00 3f
|
|
||||||
end
|
|
||||||
def test_pop
|
|
||||||
code = @machine.pop [:pc]
|
|
||||||
assert_code code , :pop , [0x00,0x80,0xbd,0xe8] #e8 bd 80 00
|
|
||||||
end
|
|
||||||
def test_pop_three
|
|
||||||
code = @machine.pop [:r0,:r1,:pc]
|
|
||||||
assert_code code , :pop , [0x03,0x80,0xbd,0xe8] #e8 bd 80 03
|
|
||||||
end
|
|
||||||
def test_pop_no_pc
|
|
||||||
code = @machine.pop [:r0,:r1,:r2 ,:r3,:r4,:r5]
|
|
||||||
assert_code code , :pop , [0x3f,0x00,0xbd,0xe8] #e8 bd 00 3f
|
|
||||||
end
|
|
||||||
|
|
||||||
end
|
|
||||||
@ -1,3 +1,2 @@
|
|||||||
require_relative "arm/test_all"
|
|
||||||
require_relative "fragments/test_all"
|
require_relative "fragments/test_all"
|
||||||
require_relative "test_intel"
|
require_relative "test_intel"
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user