more work on instrucitons, mov this time

This commit is contained in:
Torsten Ruger 2014-05-16 17:31:01 +03:00
parent 3d497ca622
commit 823c11a381
4 changed files with 108 additions and 32 deletions

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@ -73,30 +73,42 @@ module Arm
end end
# make a string out of the integer. # make a string out of the integer.
# as we don't have memory manegement yet, you have to pass the string in (ouch) # as we don't have memory management yet, we have to pass the string in (ouch)
# in a weird twist the string is actually a string, while we actually use its address. # in a weird twist the string is actually a string, while we really use its address.
# this works as the program will save any strings used onto the assmbly (thus creating a global)
def integer_to_s block , string def integer_to_s block , string
number = Vm::Integer.new(0) block.add_code push( [:lr ] , {} ) #return address
tos = Vm::Block.new("integer_to_s") # need to create a block to jump to # pin data, so no saving when recursing
block.add_code(tos) # and then use the new block to add code str_addr = Vm::Integer.new(0)
block.add_code add( str_addr , left: string)
# need to create a block to do the actual utoa, which is recursive
tos = utoa(str_addr)
block.add_code call( tos , {} ) # call the workers in
block.add_code pop( [:pc] , {} ) # return
block.add_code(tos) # and then add the new block to actually generate code
end
def utoa str_addr
number = Vm::Integer.new(str_addr.register + 1)
remainder = Vm::Integer.new( number.register + 1)
tos = Vm::Block.new("i_to_s")
#STMFD sp!, {r9, r10, lr} #function entry save working regs (for recursion) #STMFD sp!, {r9, r10, lr} #function entry save working regs (for recursion)
tos.add_code push( [:lr ] , {} ) #and the return address. tos.add_code push( [:lr ] , {} ) #and the return address.
# MOV r9, r1 # preserve arguments over following # MOV r9, r1 # preserve arguments over following
# MOV r10, r2 # function calls # MOV r10, r2 # function calls
# pin data, ie no saving
remainder = Vm::Integer.new( number.register + 1)
# BL udiv10 # r1 = r1 / 10 # BL udiv10 # r1 = r1 / 10
div10( tos , number , remainder ) div10( tos , number , remainder )
# ADD r10, r10, 48 #'0' # make char out of digit (by using ascii encoding) # ADD r10, r10, 48 #'0' # make char out of digit (by using ascii encoding)
tos.add_code add( remainder , left: remainder , right: 48 ) tos.add_code add( remainder , left: remainder , right: 48 )
#STRB r10, [r1], 1 # store digit at end of buffer #STRB r10, [r1], 1 # store digit at end of buffer
tos.add_code strb( remainder , right: string ) #and increment TODO check tos.add_code strb( remainder , right: str_addr ) #and increment TODO check
# CMP r1, #0 # quotient non-zero? # CMP r1, #0 # quotient non-zero?
tos.add_code cmp( number , right: 0 ) tos.add_code cmp( number , right: 0 )
#BLNE utoa # conditional recursive call to utoa #BLNE utoa # conditional recursive call to utoa
tos.add_code callne( tos , {} ) tos.add_code callne( tos , {} )
#LDMFD sp!, {r9, r10, pc} # function exit - restore and return #LDMFD sp!, {r9, r10, pc} # function exit - restore and return
tos.add_code pop( [:pc] , {} ) tos.add_code pop( [:pc] , {} )
return tos
end end
private private
@ -112,16 +124,24 @@ module Arm
# SUB r2, r1, #10 # keep (x-10) for later # SUB r2, r1, #10 # keep (x-10) for later
block.add_code sub( remainder , left: number , right: 10 ) block.add_code sub( remainder , left: number , right: 10 )
# SUB r1, r1, r1, lsr #2 # SUB r1, r1, r1, lsr #2
block.add_code add( number , left: number , right: number , shift_lsr: 4) block.add_code sub( number , left: number , right: number , shift_lsr: 2)
# ADD r1, r1, r1, lsr #4 # ADD r1, r1, r1, lsr #4
block.add_code add( number , left: number , right: number , shift_lsr: 4)
# ADD r1, r1, r1, lsr #8 # ADD r1, r1, r1, lsr #8
block.add_code add( number , left: number , right: number , shift_lsr: 8)
# ADD r1, r1, r1, lsr #16 # ADD r1, r1, r1, lsr #16
block.add_code add( number , left: number , right: number , shift_lsr: 16)
# MOV r1, r1, lsr #3 # MOV r1, r1, lsr #3
block.add_code mov( remainder , left: remainder , right: remainder , shift_lsr: 3)
# ADD r3, r1, r1, asl #2 # ADD r3, r1, r1, asl #2
tmp = Vm::Integer.new( remainder.register + 1)
block.add_code add( tmp , left: number , right: number , shift_lsl: 2)
# SUBS r2, r2, r3, asl #1 # calc (x-10) - (x/10)*10 # SUBS r2, r2, r3, asl #1 # calc (x-10) - (x/10)*10
block.add_code sub( remainder , left: remainder , right: tmp , shift_lsl: 1 , update_status: 1)
# ADDPL r1, r1, #1 # fix-up quotient # ADDPL r1, r1, #1 # fix-up quotient
block.add_code add( number , left: number, right: 1 , condition_code: :pl )
# ADDMI r2, r2, #10 # fix-up remainder # ADDMI r2, r2, #10 # fix-up remainder
# MOV pc, lr block.add_code add( remainder , left: remainder , right: 10 , condition_code: :mi )
end end
def syscall block , num def syscall block , num

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@ -83,5 +83,27 @@ module Arm
return nil return nil
end end
end end
#slighly wrong place for this code, but since the module gets included in instructions anyway . . .
# implement the barrel shifter on the operand (which is set up before as an integer)
def shift_handling
#codes that one can shift, first two probably most common.
# l (in lsr) means logical, ie unsigned, a (in asr) is arithmetic, ie signed
{'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100, 'ror' => 0b110, 'rrx' => 0b110}.each do |short, bin|
long = "shift_#{short}".to_sym
if shif = @attributes[long]
shif = shif.integer if (shif.is_a?(Vm::IntegerConstant))
if (shif.is_a?(Vm::Integer))
raise "should not be supported, check code #{inspect}"
bin |= 0x1;
shift = shif.register << 1
end
raise "0 < shift <= 32 #{shif} #{inspect}" if (shif >= 32) or( shif < 0)
@operand |= shift(bin , 4 )
@operand |= shift(shif , 4+3)
break
end
end
end
end end
end end

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@ -52,22 +52,7 @@ module Arm
else else
raise "invalid operand argument #{right.inspect} , #{inspect}" raise "invalid operand argument #{right.inspect} , #{inspect}"
end end
#codes that one can shift, first two probably most common. shift_handling
# l (in lsr) means logical, ie unsigned, a (in asl) is arithmetic, ie signed
{'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100, 'ror' => 0b110, 'rrx' => 0b110}.each do |short, bin|
long = "shift_#{short}".to_sym
if shif = @attributes[long]
shif = shif.integer if (shif.is_a?(Vm::IntegerConstant))
if (shif.is_a?(Vm::Integer))
bin |= 0x1;
shift = shif.register << 1
end
raise "0 < shift <= 32 #{shif} #{inspect}" if (shif >= 32) or( shif < 0)
@operand |= shift(bin , 4 )
@operand |= shift(shif , 4+3)
break
end
end
end end
def assemble(io) def assemble(io)

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@ -4,7 +4,6 @@ module Arm
class MoveInstruction < Vm::MoveInstruction class MoveInstruction < Vm::MoveInstruction
include Arm::Constants include Arm::Constants
include LogicHelper
def initialize(first , attributes) def initialize(first , attributes)
super(first , attributes) super(first , attributes)
@ -13,13 +12,63 @@ module Arm
@attributes[:opcode] = attributes[:opcode] @attributes[:opcode] = attributes[:opcode]
@operand = 0 @operand = 0
@i = 0 @immediate = 0
@rd = @first
@rn = :r0 # register zero = zero bit pattern @rn = :r0 # register zero = zero bit pattern
end end
# arm intrucions are pretty sensible, and always 4 bytes (thumb not supported)
def length
4
end
def build def build
do_build @attributes[:right] right = @attributes[:right]
if right.is_a?(Vm::StringConstant)
# do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
right = Vm::IntegerConstant.new( right.position - self.position - 8 )
@rn = :pc
end
if( right.is_a? Fixnum ) #HACK to not have to change the code just now
right = Vm::IntegerConstant.new( right )
end
if (right.is_a?(Vm::IntegerConstant))
if (right.integer.fits_u8?)
# no shifting needed
@operand = right.integer
@immediate = 1
elsif (op_with_rot = calculate_u8_with_rr(right))
@operand = op_with_rot
@immediate = 1
raise "hmm"
else
raise "cannot fit numeric literal argument in operand #{right.inspect}"
end
elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer))
@operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
@immediate = 0 # ie not immediate is register
else
raise "invalid operand argument #{right.inspect} , #{inspect}"
end
shift_handling
end
def assemble(io)
build
instuction_class = 0b00 # OPC_DATA_PROCESSING
val = shift(@operand , 0)
val |= shift(reg_code(@first) , 12)
val |= shift(reg_code(@rn) , 12+4)
val |= shift(@attributes[:update_status_flag] , 12+4+4)#20
val |= shift(op_bit_code , 12+4+4 +1)
val |= shift(@immediate , 12+4+4 +1+4)
val |= shift(instuction_class , 12+4+4 +1+4+1)
val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
io.write_uint32 val
end
def shift val , by
raise "Not integer #{val}:#{val.class}" unless val.is_a? Fixnum
val << by
end end
end end
end end