at least its in shape to start debugging again (that must count as half full)
This commit is contained in:
parent
69b04d930f
commit
7d20b5e2df
@ -36,7 +36,7 @@ module Arm
|
|||||||
end
|
end
|
||||||
def function_call call
|
def function_call call
|
||||||
raise "Not FunctionCall #{call.inspect}" unless call.is_a? Vm::FunctionCall
|
raise "Not FunctionCall #{call.inspect}" unless call.is_a? Vm::FunctionCall
|
||||||
bl( :function => call.function )
|
bl( :left => call.function )
|
||||||
end
|
end
|
||||||
|
|
||||||
def main_entry
|
def main_entry
|
||||||
@ -47,7 +47,7 @@ module Arm
|
|||||||
end
|
end
|
||||||
def syscall num
|
def syscall num
|
||||||
mov( :left => 7 , :right => num )
|
mov( :left => 7 , :right => num )
|
||||||
swi( {} )
|
swi( :left => 0 )
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
end
|
end
|
@ -1,10 +1,10 @@
|
|||||||
require 'asm/nodes'
|
require 'arm/nodes'
|
||||||
require 'asm/block'
|
require 'arm/block'
|
||||||
require 'stream_reader'
|
require 'stream_reader'
|
||||||
require 'stringio'
|
require 'stringio'
|
||||||
require "asm/string_literal"
|
require "arm/string_literal"
|
||||||
|
|
||||||
module Asm
|
module Arm
|
||||||
|
|
||||||
# Assembler is the the top-level of the code hierachy, except it is not derived from code
|
# Assembler is the the top-level of the code hierachy, except it is not derived from code
|
||||||
# instead a Assembler is a list of blocks (and string constants)
|
# instead a Assembler is a list of blocks (and string constants)
|
||||||
@ -43,7 +43,7 @@ module Asm
|
|||||||
def add_string str
|
def add_string str
|
||||||
code = @string_table[str]
|
code = @string_table[str]
|
||||||
return code if code
|
return code if code
|
||||||
data = Asm::StringLiteral.new(str)
|
data = Arm::StringLiteral.new(str)
|
||||||
@string_table[str] = data
|
@string_table[str] = data
|
||||||
end
|
end
|
||||||
|
|
||||||
|
@ -1,8 +0,0 @@
|
|||||||
module Asm
|
|
||||||
class AssemblyError < StandardError
|
|
||||||
def initialize(message)
|
|
||||||
super(message)
|
|
||||||
end
|
|
||||||
end
|
|
||||||
end
|
|
||||||
|
|
@ -3,7 +3,7 @@ require_relative 'stack_instruction'
|
|||||||
require_relative 'logic_instruction'
|
require_relative 'logic_instruction'
|
||||||
require_relative 'memory_instruction'
|
require_relative 'memory_instruction'
|
||||||
|
|
||||||
module Asm
|
module Arm
|
||||||
|
|
||||||
class Code ; end
|
class Code ; end
|
||||||
|
|
||||||
@ -48,76 +48,6 @@ module Asm
|
|||||||
end
|
end
|
||||||
attr_reader :name
|
attr_reader :name
|
||||||
|
|
||||||
ArmMachine::REGISTERS.each do |reg , number|
|
|
||||||
define_method(reg) { Asm::Register.new(reg , number) }
|
|
||||||
end
|
|
||||||
|
|
||||||
def instruction(clazz, opcode , condition_code , update_status , *args)
|
|
||||||
arg_nodes = []
|
|
||||||
args.each do |arg|
|
|
||||||
if (arg.is_a?(Asm::Register))
|
|
||||||
arg_nodes << arg
|
|
||||||
elsif (arg.is_a?(Integer))
|
|
||||||
arg_nodes << Asm::NumLiteral.new(arg)
|
|
||||||
elsif (arg.is_a?(String))
|
|
||||||
arg_nodes << @program.add_string(arg)
|
|
||||||
elsif (arg.is_a?(Asm::Block))
|
|
||||||
arg_nodes << arg
|
|
||||||
elsif (arg.is_a?(Symbol))
|
|
||||||
block = @program.get_block arg
|
|
||||||
arg_nodes << block
|
|
||||||
else
|
|
||||||
raise "Invalid argument #{arg.inspect} for instruction"
|
|
||||||
end
|
|
||||||
end
|
|
||||||
add_code clazz.new(opcode , condition_code , update_status , arg_nodes)
|
|
||||||
end
|
|
||||||
|
|
||||||
|
|
||||||
def self.define_instruction(inst , clazz )
|
|
||||||
define_method(inst) do |*args|
|
|
||||||
instruction clazz , inst , :al , 0 , *args
|
|
||||||
end
|
|
||||||
define_method("#{inst}s") do |*args|
|
|
||||||
instruction clazz , inst , :al , 1 , *args
|
|
||||||
end
|
|
||||||
ArmMachine::COND_CODES.keys.each do |suffix|
|
|
||||||
define_method("#{inst}#{suffix}") do |*args|
|
|
||||||
instruction clazz , inst , suffix , 0 , *args
|
|
||||||
end
|
|
||||||
define_method("#{inst}s#{suffix}") do |*args|
|
|
||||||
instruction clazz , inst , suffix , 1 , *args
|
|
||||||
end
|
|
||||||
end
|
|
||||||
end
|
|
||||||
|
|
||||||
[:push, :pop].each do |inst|
|
|
||||||
define_instruction(inst , StackInstruction)
|
|
||||||
end
|
|
||||||
|
|
||||||
[:adc, :add, :and, :bic, :eor, :orr, :rsb, :rsc, :sbc, :sub].each do |inst|
|
|
||||||
define_instruction(inst , LogicInstruction)
|
|
||||||
end
|
|
||||||
[:mov, :mvn].each do |inst|
|
|
||||||
define_instruction(inst , MoveInstruction)
|
|
||||||
end
|
|
||||||
[:cmn, :cmp, :teq, :tst].each do |inst|
|
|
||||||
define_instruction(inst , CompareInstruction)
|
|
||||||
end
|
|
||||||
[:strb, :str , :ldrb, :ldr].each do |inst|
|
|
||||||
define_instruction(inst , MemoryInstruction)
|
|
||||||
end
|
|
||||||
[:b, :bl , :swi].each do |inst|
|
|
||||||
define_instruction(inst , CallInstruction)
|
|
||||||
end
|
|
||||||
|
|
||||||
# codeing a block fixes it's position in the stream.
|
|
||||||
# You must call with a block, which is instance_eval'd and provides the actual code for the block
|
|
||||||
def code &block
|
|
||||||
@program.add_block self
|
|
||||||
self.instance_eval block
|
|
||||||
end
|
|
||||||
|
|
||||||
# length of the codes. In arm it would be the length * 4
|
# length of the codes. In arm it would be the length * 4
|
||||||
# (strings are stored globally in the Assembler)
|
# (strings are stored globally in the Assembler)
|
||||||
def length
|
def length
|
||||||
|
@ -1,4 +1,5 @@
|
|||||||
require_relative "instruction"
|
require_relative "instruction"
|
||||||
|
require_relative "nodes"
|
||||||
|
|
||||||
module Arm
|
module Arm
|
||||||
# There are only three call instructions in arm branch (b), call (bl) and syscall (swi)
|
# There are only three call instructions in arm branch (b), call (bl) and syscall (swi)
|
||||||
@ -14,33 +15,54 @@ module Arm
|
|||||||
# Registers 0-6 hold the call values as for a normal c call
|
# Registers 0-6 hold the call values as for a normal c call
|
||||||
|
|
||||||
class CallInstruction < Vm::CallInstruction
|
class CallInstruction < Vm::CallInstruction
|
||||||
|
include Arm::Constants
|
||||||
|
|
||||||
|
# arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
|
||||||
|
def length
|
||||||
|
4
|
||||||
|
end
|
||||||
|
|
||||||
|
def initialize(options)
|
||||||
|
super(options)
|
||||||
|
@update_status_flag = 0
|
||||||
|
@condition_code = :al
|
||||||
|
@opcode = options[:opcode]
|
||||||
|
@args = [options[:left] , options[:right] , options[:extra]]
|
||||||
|
@operand = 0
|
||||||
|
end
|
||||||
|
|
||||||
def assemble(io)
|
def assemble(io)
|
||||||
case opcode
|
case @opcode
|
||||||
when :b, :bl
|
when :b, :bl
|
||||||
arg = args[0]
|
arg = @args[0]
|
||||||
if arg.is_a? Block
|
if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
|
||||||
diff = arg.position - self.position - 8
|
arg = Arm::NumLiteral.new( arg )
|
||||||
arg = NumLiteral.new(diff)
|
|
||||||
end
|
end
|
||||||
if (arg.is_a?(Asm::NumLiteral))
|
if arg.is_a? Vm::Code
|
||||||
|
diff = arg.position - self.position - 8
|
||||||
|
arg = Arm::NumLiteral.new(diff)
|
||||||
|
end
|
||||||
|
if (arg.is_a?(Arm::NumLiteral))
|
||||||
jmp_val = arg.value >> 2
|
jmp_val = arg.value >> 2
|
||||||
packed = [jmp_val].pack('l')
|
packed = [jmp_val].pack('l')
|
||||||
# signed 32-bit, condense to 24-bit
|
# signed 32-bit, condense to 24-bit
|
||||||
# TODO add check that the value fits into 24 bits
|
# TODO add check that the value fits into 24 bits
|
||||||
io << packed[0,3]
|
io << packed[0,3]
|
||||||
else
|
else
|
||||||
raise "else not coded #{arg.inspect}"
|
raise "else not coded #{inspect}"
|
||||||
end
|
end
|
||||||
io.write_uint8 OPCODES[opcode] | (COND_CODES[@condition_code] << 4)
|
io.write_uint8 OPCODES[opcode] | (COND_CODES[@condition_code] << 4)
|
||||||
when :swi
|
when :swi
|
||||||
arg = args[0]
|
arg = @args[0]
|
||||||
if (arg.is_a?(Asm::NumLiteral))
|
if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
|
||||||
|
arg = Arm::NumLiteral.new( arg )
|
||||||
|
end
|
||||||
|
if (arg.is_a?(Arm::NumLiteral))
|
||||||
packed = [arg.value].pack('L')[0,3]
|
packed = [arg.value].pack('L')[0,3]
|
||||||
io << packed
|
io << packed
|
||||||
io.write_uint8 0b1111 | (COND_CODES[@condition_code] << 4)
|
io.write_uint8 0b1111 | (COND_CODES[@condition_code] << 4)
|
||||||
else
|
else
|
||||||
raise Asm::AssemblyError.new("invalid operand argument expected literal not #{arg}")
|
raise "invalid operand argument expected literal not #{arg} #{inspect}"
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
@ -51,11 +51,13 @@ module Arm
|
|||||||
'v6' => 9, 'rfp' => 9, 'sl' => 10, 'fp' => 11, 'ip' => 12, 'sp' => 13,
|
'v6' => 9, 'rfp' => 9, 'sl' => 10, 'fp' => 11, 'ip' => 12, 'sp' => 13,
|
||||||
'lr' => 14, 'pc' => 15 }
|
'lr' => 14, 'pc' => 15 }
|
||||||
def reg name
|
def reg name
|
||||||
raise "no such register #{reg}" unless REGISTERS[name]
|
code = reg_code name
|
||||||
Asm::Register.new(name , REGISTERS[name])
|
raise "no such register #{name}" unless code
|
||||||
|
Arm::Register.new(name.to_sym , code )
|
||||||
|
end
|
||||||
|
def reg_code name
|
||||||
|
REGISTERS[name.to_s]
|
||||||
end
|
end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
def calculate_u8_with_rr(arg)
|
def calculate_u8_with_rr(arg)
|
||||||
parts = arg.value.to_s(2).rjust(32,'0').scan(/^(0*)(.+?)0*$/).flatten
|
parts = arg.value.to_s(2).rjust(32,'0').scan(/^(0*)(.+?)0*$/).flatten
|
||||||
|
@ -1,10 +1,7 @@
|
|||||||
require "vm/instruction"
|
require "vm/instruction"
|
||||||
require_relative "constants"
|
require_relative "constants"
|
||||||
|
|
||||||
Vm::Instruction.class_eval do
|
class Saved
|
||||||
include Arm::Constants
|
|
||||||
|
|
||||||
COND_POSTFIXES = Regexp.union( Arm::Constants::COND_CODES.keys.collect{|k|k.to_s} ).source
|
|
||||||
|
|
||||||
def initializ(opcode , condition_code , update_status , args)
|
def initializ(opcode , condition_code , update_status , args)
|
||||||
@update_status_flag = update_status
|
@update_status_flag = update_status
|
||||||
|
@ -1,33 +1,31 @@
|
|||||||
require_relative "instruction"
|
require_relative "instruction"
|
||||||
|
|
||||||
module Arm
|
module Arm
|
||||||
|
module LogicHelper
|
||||||
# ADDRESSING MODE 1
|
# ADDRESSING MODE 1
|
||||||
# Logic ,Maths, Move and compare instructions (last three below)
|
# Logic ,Maths, Move and compare instructions (last three below)
|
||||||
|
|
||||||
class LogicInstruction < Vm::LogicInstruction
|
|
||||||
|
|
||||||
def initializ(opcode , condition_code , update_status , args)
|
|
||||||
super(opcode , condition_code , update_status , args)
|
|
||||||
@rn = nil
|
|
||||||
@i = 0
|
|
||||||
@rd = args[0]
|
|
||||||
end
|
|
||||||
attr_accessor :i, :rn, :rd
|
|
||||||
|
|
||||||
# Build representation for source value
|
# Build representation for source value
|
||||||
def build
|
def build
|
||||||
@rn = args[1]
|
@rn = @args[1]
|
||||||
do_build args[2]
|
do_build @args[2]
|
||||||
|
end
|
||||||
|
|
||||||
|
# arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
|
||||||
|
def length
|
||||||
|
4
|
||||||
end
|
end
|
||||||
|
|
||||||
#(stays in subclases, while build is overriden to provide different arguments)
|
#(stays in subclases, while build is overriden to provide different arguments)
|
||||||
def do_build(arg)
|
def do_build(arg)
|
||||||
if arg.is_a?(Asm::StringLiteral)
|
if arg.is_a?(Arm::StringLiteral)
|
||||||
# do pc relative addressing with the difference to the instuction
|
# do pc relative addressing with the difference to the instuction
|
||||||
# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
|
# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
|
||||||
arg = Asm::NumLiteral.new( arg.position - self.position - 8 )
|
arg = Arm::NumLiteral.new( arg.position - self.position - 8 )
|
||||||
end
|
end
|
||||||
if (arg.is_a?(Asm::NumLiteral))
|
if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
|
||||||
|
arg = Arm::NumLiteral.new( arg )
|
||||||
|
end
|
||||||
|
if (arg.is_a?(Arm::NumLiteral))
|
||||||
if (arg.value.fits_u8?)
|
if (arg.value.fits_u8?)
|
||||||
# no shifting needed
|
# no shifting needed
|
||||||
@operand = arg.value
|
@operand = arg.value
|
||||||
@ -36,28 +34,28 @@ module Arm
|
|||||||
@operand = op_with_rot
|
@operand = op_with_rot
|
||||||
@i = 1
|
@i = 1
|
||||||
else
|
else
|
||||||
raise Asm::AssemblyError.new("cannot fit numeric literal argument in operand #{arg}")
|
raise "cannot fit numeric literal argument in operand #{arg}"
|
||||||
end
|
end
|
||||||
elsif (arg.is_a?(Asm::Register))
|
elsif (arg.is_a?(Arm::Register))
|
||||||
@operand = arg
|
@operand = arg
|
||||||
@i = 0
|
@i = 0
|
||||||
elsif (arg.is_a?(Asm::Shift))
|
elsif (arg.is_a?(Arm::Shift))
|
||||||
rm_ref = arg.argument
|
rm_ref = arg.argument
|
||||||
@i = 0
|
@i = 0
|
||||||
shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
|
shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
|
||||||
'ror' => 0b110, 'rrx' => 0b110}[arg.type]
|
'ror' => 0b110, 'rrx' => 0b110}[arg.type]
|
||||||
if (arg.type == 'ror' and arg.value.nil?)
|
if (arg.type == 'ror' and arg.value.nil?)
|
||||||
# ror #0 == rrx
|
# ror #0 == rrx
|
||||||
raise Asm::AssemblyError.new('cannot rotate by zero', arg)
|
raise "cannot rotate by zero #{arg} #{inspect}"
|
||||||
end
|
end
|
||||||
|
|
||||||
arg1 = arg.value
|
arg1 = arg.value
|
||||||
if (arg1.is_a?(Asm::NumLiteral))
|
if (arg1.is_a?(Arm::NumLiteral))
|
||||||
if (arg1.value >= 32)
|
if (arg1.value >= 32)
|
||||||
raise Asm::AssemblyError.new('cannot shift by more than 31', arg1)
|
raise "cannot shift by more than 31 #{arg1} #{inspect}"
|
||||||
end
|
end
|
||||||
shift_imm = arg1.value
|
shift_imm = arg1.value
|
||||||
elsif (arg1.is_a?(Asm::Register))
|
elsif (arg1.is_a?(Arm::Register))
|
||||||
shift_op val |= 0x1;
|
shift_op val |= 0x1;
|
||||||
shift_imm = arg1.number << 1
|
shift_imm = arg1.number << 1
|
||||||
elsif (arg.type == 'rrx')
|
elsif (arg.type == 'rrx')
|
||||||
@ -66,43 +64,78 @@ module Arm
|
|||||||
|
|
||||||
@operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
|
@operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
|
||||||
else
|
else
|
||||||
raise Asm::AssemblyError.new("invalid operand argument #{arg.inspect}")
|
raise "invalid operand argument #{arg.inspect}"
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
def assemble(io)
|
def assemble(io)
|
||||||
build
|
build
|
||||||
instuction_class = 0b00 # OPC_DATA_PROCESSING
|
instuction_class = 0b00 # OPC_DATA_PROCESSING
|
||||||
val = operand.is_a?(Register) ? operand.bits : operand
|
val = @operand.is_a?(Symbol) ? reg_code(@operand) : @operand
|
||||||
val |= (rd.bits << 12)
|
val |= (reg_code(@rd) << 12)
|
||||||
val |= (rn.bits << 12+4)
|
val |= (reg_code(@rn) << 12+4)
|
||||||
val |= (update_status_flag << 12+4+4)#20
|
val |= (@update_status_flag << 12+4+4)#20
|
||||||
val |= (op_bit_code << 12+4+4 +1)
|
val |= (op_bit_code << 12+4+4 +1)
|
||||||
val |= (i << 12+4+4 +1+4)
|
val |= (@i << 12+4+4 +1+4)
|
||||||
val |= (instuction_class << 12+4+4 +1+4+1)
|
val |= (instuction_class << 12+4+4 +1+4+1)
|
||||||
val |= (cond_bit_code << 12+4+4 +1+4+1+2)
|
val |= (cond_bit_code << 12+4+4 +1+4+1+2)
|
||||||
io.write_uint32 val
|
io.write_uint32 val
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
class LogicInstruction < Vm::LogicInstruction
|
||||||
|
include Arm::Constants
|
||||||
|
include LogicHelper
|
||||||
|
|
||||||
|
def initialize(options)
|
||||||
|
super(options)
|
||||||
|
@update_status_flag = 0
|
||||||
|
@condition_code = :al
|
||||||
|
@opcode = options[:opcode]
|
||||||
|
@args = [options[:left] , options[:right] , options[:extra]]
|
||||||
|
@operand = 0
|
||||||
|
|
||||||
|
@rn = nil
|
||||||
|
@i = 0
|
||||||
|
@rd = args[0]
|
||||||
|
end
|
||||||
|
attr_accessor :i, :rn, :rd
|
||||||
|
|
||||||
|
end
|
||||||
class CompareInstruction < Vm::CompareInstruction
|
class CompareInstruction < Vm::CompareInstruction
|
||||||
def initialize(opcode , condition_code , update_status , args)
|
def initialize(options)
|
||||||
super(opcode , condition_code , update_status , args)
|
super(options)
|
||||||
|
@condition_code = :al
|
||||||
|
@opcode = options[:opcode]
|
||||||
|
@args = [options[:left] , options[:right] , options[:extra]]
|
||||||
|
@operand = 0
|
||||||
|
@i = 0
|
||||||
@update_status_flag = 1
|
@update_status_flag = 1
|
||||||
@rn = args[0]
|
@rn = @args[0]
|
||||||
@rd = reg "r0"
|
@rd = :r0
|
||||||
end
|
end
|
||||||
def build
|
def build
|
||||||
do_build args[1]
|
do_build args[1]
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
class MoveInstruction < Vm::MoveInstruction
|
class MoveInstruction < Vm::MoveInstruction
|
||||||
def initializ(opcode , condition_code , update_status , args)
|
include Arm::Constants
|
||||||
super(opcode , condition_code , update_status , args)
|
include LogicHelper
|
||||||
@rn = reg "r0" # register zero = zero bit pattern
|
|
||||||
|
def initialize(options)
|
||||||
|
super(options)
|
||||||
|
@update_status_flag = 0
|
||||||
|
@condition_code = :al
|
||||||
|
@opcode = options[:opcode]
|
||||||
|
@args = [options[:left] , options[:right] , options[:extra]]
|
||||||
|
@operand = 0
|
||||||
|
|
||||||
|
@i = 0
|
||||||
|
@rd = @args[0]
|
||||||
|
@rn = :r0 # register zero = zero bit pattern
|
||||||
end
|
end
|
||||||
|
|
||||||
def build
|
def build
|
||||||
do_build args[1]
|
do_build @args[1]
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
end
|
end
|
@ -1,10 +1,11 @@
|
|||||||
require "asm/nodes"
|
require_relative "nodes"
|
||||||
require_relative "instruction"
|
require_relative "instruction"
|
||||||
|
|
||||||
module Arm
|
module Arm
|
||||||
# ADDRESSING MODE 2
|
# ADDRESSING MODE 2
|
||||||
# Implemented: immediate offset with offset=0
|
# Implemented: immediate offset with offset=0
|
||||||
class MemoryInstruction < Vm::MemoryInstruction
|
class MemoryInstruction < Vm::MemoryInstruction
|
||||||
|
include Arm::Constants
|
||||||
|
|
||||||
def initialize(opcode , condition_code , update_status , args)
|
def initialize(opcode , condition_code , update_status , args)
|
||||||
super(opcode , condition_code , update_status , args)
|
super(opcode , condition_code , update_status , args)
|
||||||
@ -20,6 +21,11 @@ module Arm
|
|||||||
attr_accessor :i, :pre_post_index, :add_offset,
|
attr_accessor :i, :pre_post_index, :add_offset,
|
||||||
:byte_access, :w, :is_load, :rn, :rd
|
:byte_access, :w, :is_load, :rn, :rd
|
||||||
|
|
||||||
|
# arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
|
||||||
|
def length
|
||||||
|
4
|
||||||
|
end
|
||||||
|
|
||||||
# Build representation for target address
|
# Build representation for target address
|
||||||
def build
|
def build
|
||||||
if( @is_load )
|
if( @is_load )
|
||||||
@ -30,7 +36,7 @@ module Arm
|
|||||||
arg = args[0]
|
arg = args[0]
|
||||||
end
|
end
|
||||||
#str / ldr are _serious instructions. With BIG possibilities not half are implemented
|
#str / ldr are _serious instructions. With BIG possibilities not half are implemented
|
||||||
if (arg.is_a?(Asm::Register))
|
if (arg.is_a?(Arm::Register))
|
||||||
@rn = arg
|
@rn = arg
|
||||||
if(arg.offset != 0)
|
if(arg.offset != 0)
|
||||||
@operand = arg.offset
|
@operand = arg.offset
|
||||||
@ -42,16 +48,16 @@ module Arm
|
|||||||
@add_offset = 1
|
@add_offset = 1
|
||||||
end
|
end
|
||||||
if (@operand.abs > 4095)
|
if (@operand.abs > 4095)
|
||||||
raise Asm::AssemblyError.new("reference offset too large/small (max 4095) #{argr.right}" )
|
raise "reference offset too large/small (max 4095) #{arg} #{inspect}"
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
elsif (arg.is_a?(Asm::Label) or arg.is_a?(Asm::NumLiteral))
|
elsif (arg.is_a?(Arm::Label) or arg.is_a?(Arm::NumLiteral))
|
||||||
@pre_post_index = 1
|
@pre_post_index = 1
|
||||||
@rn = pc
|
@rn = pc
|
||||||
@use_addrtable_reloc = true
|
@use_addrtable_reloc = true
|
||||||
@addrtable_reloc_target = arg
|
@addrtable_reloc_target = arg
|
||||||
else
|
else
|
||||||
raise Asm::AssemblyError.new("invalid operand argument #{arg.inspect}")
|
raise "invalid operand argument #{arg.inspect} #{inspect}"
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
module Asm
|
module Arm
|
||||||
|
|
||||||
class Shift
|
class Shift
|
||||||
attr_accessor :type, :value, :argument
|
attr_accessor :type, :value, :argument
|
||||||
@ -30,7 +30,7 @@ module Asm
|
|||||||
attr_accessor :registers
|
attr_accessor :registers
|
||||||
def initialize regs
|
def initialize regs
|
||||||
@registers = regs
|
@registers = regs
|
||||||
regs.each{ |reg| raise "not a reg #{sym} , #{reg}" unless reg.is_a?(Asm::Register) }
|
regs.each{ |reg| raise "not a reg #{sym} , #{reg}" unless reg.is_a?(Arm::Register) }
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
|
@ -3,9 +3,21 @@ require_relative "instruction"
|
|||||||
module Arm
|
module Arm
|
||||||
# ADDRESSING MODE 4
|
# ADDRESSING MODE 4
|
||||||
class StackInstruction < Vm::StackInstruction
|
class StackInstruction < Vm::StackInstruction
|
||||||
|
include Arm::Constants
|
||||||
|
|
||||||
|
# arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
|
||||||
|
def length
|
||||||
|
4
|
||||||
|
end
|
||||||
|
|
||||||
|
def initialize(options)
|
||||||
|
super(options)
|
||||||
|
@update_status_flag = 0
|
||||||
|
@condition_code = :al
|
||||||
|
@opcode = options[:opcode]
|
||||||
|
@args = [options[:left] , options[:right] , options[:extra]]
|
||||||
|
@operand = 0
|
||||||
|
|
||||||
def initializ(opcode , condition_code , update_status , args)
|
|
||||||
super(opcode , condition_code , update_status , args)
|
|
||||||
@update_status_flag= 0
|
@update_status_flag= 0
|
||||||
@rn = reg "r0" # register zero = zero bit pattern
|
@rn = reg "r0" # register zero = zero bit pattern
|
||||||
# downward growing, decrement before memory access
|
# downward growing, decrement before memory access
|
||||||
@ -51,7 +63,7 @@ module Arm
|
|||||||
@operand |= (1 << reg.bits)
|
@operand |= (1 << reg.bits)
|
||||||
end
|
end
|
||||||
else
|
else
|
||||||
raise Asm::AssemblyError.new("invalid operand argument #{args.inspect}")
|
raise "invalid operand argument #{args.inspect}"
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
@ -1,6 +1,6 @@
|
|||||||
require_relative "../vm/code"
|
require "vm/code"
|
||||||
|
|
||||||
module Asm
|
module Arm
|
||||||
# The name really says it all.
|
# The name really says it all.
|
||||||
# The only interesting thing is storage.
|
# The only interesting thing is storage.
|
||||||
# Currently string are stored "inline" , ie in the code segment.
|
# Currently string are stored "inline" , ie in the code segment.
|
||||||
|
@ -1,6 +1,6 @@
|
|||||||
require 'parslet'
|
require 'parslet'
|
||||||
|
|
||||||
require "asm/assembler"
|
require "arm/assembler"
|
||||||
require "elf/object_writer"
|
require "elf/object_writer"
|
||||||
require 'parser/composed'
|
require 'parser/composed'
|
||||||
require 'parser/transform'
|
require 'parser/transform'
|
||||||
|
@ -13,7 +13,7 @@ module Vm
|
|||||||
|
|
||||||
# set the position to zero, will have to reset later
|
# set the position to zero, will have to reset later
|
||||||
def initialize
|
def initialize
|
||||||
@position = 0
|
@address = 0
|
||||||
end
|
end
|
||||||
|
|
||||||
# the position in the stream. Think of it as an address if you want. The difference is small.
|
# the position in the stream. Think of it as an address if you want. The difference is small.
|
||||||
|
@ -33,8 +33,8 @@ class TestRunner < MiniTest::Test
|
|||||||
|
|
||||||
assembly = program.assemble(StringIO.new)
|
assembly = program.assemble(StringIO.new)
|
||||||
|
|
||||||
writer.set_text assembly
|
writer.set_text assembly.string
|
||||||
writer.save("#{file}_test.o")
|
writer.save(file.gsub(".rb" , ".o"))
|
||||||
|
|
||||||
puts program.to_yaml
|
puts program.to_yaml
|
||||||
end
|
end
|
||||||
|
Loading…
Reference in New Issue
Block a user