Fixed all after changing argument handling

arguments are now fully inlined into the message
locals next
This commit is contained in:
Torsten Rüger 2019-08-22 23:10:29 +03:00
parent 017e7e2971
commit 7ca3599c5a
18 changed files with 159 additions and 179 deletions

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@ -52,7 +52,7 @@ module Parfait
get_at(index)
end
def to_s
"Message:#{method&.name}(#{arguments.get_length})"
"Message:#{method&.name}(#{arguments_given})"
end
end
end

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@ -55,7 +55,7 @@ module Risc
# resolve the given slot name (instance variable name) to an index using the type
# RegisterValue has the current type, so we just look up the index in the type
def resolve_index(slot)
#puts "TYPE #{type} obj:#{object} var:#{slot} comp:#{compiler}"
#puts "TYPE #{type} var:#{slot} "
index = type.variable_index(slot)
raise "Index not found for #{slot} in #{type} of type #{@type}" unless index
return index

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@ -7,7 +7,7 @@ module Risc
def setup
super
@input = "arg = 5;return"
@expect = [LoadConstant, SlotToReg, RegToSlot, LoadConstant, RegToSlot, Branch]
@expect = [LoadConstant, RegToSlot, LoadConstant, RegToSlot, Branch]
end
def test_local_assign_instructions
assert_nil msg = check_nil , msg
@ -25,7 +25,7 @@ module Risc
def test_load_args_from_message
produced = produce_body
assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf[0..200]
assert_equal 3 , produced.next.index , produced.next.to_rxf[0..200]
assert_equal 9 , produced.next.index , produced.next.to_rxf[0..200]
end
end

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@ -7,10 +7,9 @@ module Risc
def setup
super
@input = "if(@a) ; arg = 5 ; end;return"
@expect = [Label, SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, #4
IsZero, LoadConstant, OperatorInstruction, IsZero, LoadConstant, #9
RegToSlot, Branch, Label, LoadConstant, RegToSlot, #14
Branch] #19
@expect = [SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsZero, #4
LoadConstant, OperatorInstruction, IsZero, Label, LoadConstant, #9
RegToSlot, Label, LoadConstant, RegToSlot, Branch] #14
end
def test_if_instructions
@ -22,9 +21,7 @@ module Risc
assert_equal Parfait::FalseClass , produced.next(2).constant.class
end
def test_isnotzero
produced = produce_body
check = produced.next(4)
assert_equal IsZero , check.class
assert_equal IsZero , produce_body.next(4).class
end
def test_false_label
produced = produce_body
@ -32,18 +29,14 @@ module Risc
end
def test_false_check
produced = produce_body
assert_equal IsZero , produced.next(12).class
assert_equal produced.next(12) , produced.next(4).label
assert_equal IsZero , produce_body.next(4).class
assert_equal Label , produced.next(11).class
assert_equal produced.next(11).name , produced.next(4).label.name
end
def test_nil_load
produced = produce_body
assert_equal Parfait::NilClass , produced.next(5).constant.class
end
def test_nil_check
produced = produce_body
assert_equal Label , produced.next(4).label.class
assert_equal produced.next(12) , produced.next(4).label
end
def test_true_label
produced = produce_body
assert produced.next(8).name.start_with?("true_label")

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@ -9,8 +9,8 @@ module Risc
@input = "while(@a) ; arg = 5 end;return"
@expect = [Label, SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, #4
IsZero, LoadConstant, OperatorInstruction, IsZero, LoadConstant, #9
SlotToReg, RegToSlot, Branch, Label, LoadConstant, #14
RegToSlot, Branch] #19
RegToSlot, Branch, Label, LoadConstant, RegToSlot, #14
Branch] #19
end
def test_while_instructions
@ -23,25 +23,22 @@ module Risc
end
def test_false_check
produced = produce_body
assert_equal produced.next(13) , produced.next(5).label
assert_equal IsZero , produced.next(5).class
assert_equal Label , produced.next(12).class
assert_equal produced.next(12).name , produced.next(5).label.name
end
def test_nil_load
produced = produce_body
assert_equal Parfait::NilClass , produced.next(6).constant.class
end
def test_nil_check
produced = produce_body
assert_equal produced.next(13) , produced.next(8).label
end
def test_merge_label
produced = produce_body
assert produced.next(13).name.start_with?("merge_label")
assert produced.next(12).name.start_with?("merge_label")
end
def test_back_jump # should jump back to condition label
produced = produce_body
assert_equal produced , produced.next(12).label
assert_equal Branch , produced.next(11).class
assert_equal produced.name , produced.next(11).label.name
end
end
end

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@ -22,7 +22,7 @@ module Parfait
def test_length
assert @mess
assert @mess.get_type
assert_equal 9 , @mess.get_type.instance_length , @mess.get_type.inspect
assert_equal 15 , @mess.get_type.instance_length , @mess.get_type.inspect
end
def test_names
@ -33,7 +33,7 @@ module Parfait
end
def test_type_length
assert_equal 9 , @mess.get_type.instance_length , @mess.get_type.inspect
assert_equal 15 , @mess.get_type.instance_length , @mess.get_type.inspect
end
def test_type_length_index
@ -45,7 +45,7 @@ module Parfait
def test_no_index_below_0
type = @mess.get_type
names = type.names
assert_equal 9 , names.get_length , names.inspect
assert_equal 15 , names.get_length , names.inspect
names.each do |n|
assert type.variable_index(n) >= 0
end

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@ -14,51 +14,51 @@ module Risc
check_main_chain [LoadConstant, SlotToReg, RegToSlot, LoadConstant, LoadConstant,
SlotToReg, SlotToReg, RegToSlot, RegToSlot, RegToSlot, # 10
RegToSlot, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, # 20
RegToSlot, SlotToReg, FunctionCall, LoadConstant, SlotToReg,
OperatorInstruction, IsZero, SlotToReg, SlotToReg, LoadConstant, # 30
SlotToReg, SlotToReg, RegToSlot, RegToSlot, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg, # 40
LoadConstant, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
DynamicJump, LoadConstant, SlotToReg, SlotToReg, SlotToReg, # 50
RegToSlot, LoadConstant, RegToSlot, Branch, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 60
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg, # 70
RegToSlot, Branch, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 80
SlotToReg, SlotToReg, RegToSlot, Branch, SlotToReg,
SlotToReg, Branch, RegToSlot, LoadConstant, SlotToReg, # 90
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall, # 100
NilClass, ]
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 20
SlotToReg, FunctionCall, LoadConstant, SlotToReg, OperatorInstruction,
IsZero, SlotToReg, LoadConstant, SlotToReg, SlotToReg, # 30
RegToSlot, RegToSlot, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, LoadConstant, RegToSlot, # 40
SlotToReg, SlotToReg, DynamicJump, LoadConstant, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, RegToSlot, # 50
Branch, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg, # 60
SlotToReg, FunctionReturn, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, # 70
Branch, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot, # 80
Branch, SlotToReg, SlotToReg, RegToSlot, Branch,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg, # 90
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg,
SlotToReg, Syscall, NilClass, ]
assert_equal 10 , get_return
end
def base ; 43 ; end
def test_block_jump
load_ins = main_ticks(46)
load_ins = main_ticks(base)
assert_equal DynamicJump , load_ins.class
assert_equal Parfait::Block , @interpreter.get_register(load_ins.register).class
end
def test_block_load
load_ins = main_ticks(47)
load_ins = main_ticks(base+1)
assert_load load_ins , Parfait::Integer , :r1
assert_equal 10 , @interpreter.get_register(load_ins.register).value
end
def test_block_slot1
assert_slot_to_reg main_ticks(48) ,:r0 , 6 , :r2
assert_slot_to_reg main_ticks(base+2) ,:r0 , 6 , :r2
end
def test_block_slot2
assert_slot_to_reg main_ticks(49) ,:r2 , 6 , :r2
assert_slot_to_reg main_ticks(base+3) ,:r2 , 6 , :r2
end
def test_block_slot3
assert_slot_to_reg main_ticks(50) ,:r2 , 3 , :r2
assert_slot_to_reg main_ticks(base+4) ,:r2 , 3 , :r2
end
def test_block_reg
assert_reg_to_slot main_ticks(51) ,:r1 , :r2 , 1
assert_reg_to_slot main_ticks(base+5) ,:r1 , :r2 , 1
end
def test_ret_load
load_ins = main_ticks(52)
load_ins = main_ticks(base+6)
assert_load load_ins , Parfait::Integer , :r1
assert_equal 15 , @interpreter.get_register(load_ins.register).value
end

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@ -13,35 +13,34 @@ module Risc
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall, # 20
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg,
SlotToReg, LoadConstant, SlotToReg, SlotToReg, RegToSlot, # 30
RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, LoadConstant, RegToSlot, SlotToReg, # 40
SlotToReg, SlotToReg, DynamicJump, LoadConstant, RegToSlot,
Branch, SlotToReg, SlotToReg, RegToSlot, LoadConstant, # 50
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, RegToSlot, Branch, # 60
SlotToReg, SlotToReg, RegToSlot, Branch, LoadConstant,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg, # 70
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, Branch, SlotToReg, # 80
SlotToReg, Branch, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 90
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall,
NilClass, ]
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, FunctionCall, LoadConstant, # 20
SlotToReg, OperatorInstruction, IsZero, SlotToReg, LoadConstant,
SlotToReg, SlotToReg, RegToSlot, RegToSlot, RegToSlot, # 30
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
LoadConstant, RegToSlot, SlotToReg, SlotToReg, DynamicJump, # 40
LoadConstant, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot, # 50
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, # 60
LoadConstant, SlotToReg, Branch, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg, # 70
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
Branch, SlotToReg, SlotToReg, RegToSlot, Branch, # 80
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg, # 90
SlotToReg, Syscall, NilClass, ]
assert_equal 15 , get_return
end
def test_load_return
load_ins = main_ticks(38)
load_ins = main_ticks(36)
assert_equal LoadConstant , load_ins.class
assert_equal Parfait::ReturnAddress , @interpreter.get_register(load_ins.register).class
end
def test_load_block
load_ins = main_ticks(43)
load_ins = main_ticks(40)
assert_equal DynamicJump , load_ins.class
assert_equal Parfait::Block , @interpreter.get_register(load_ins.register).class
assert_equal :main_block , @interpreter.get_register(load_ins.register).name

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@ -14,22 +14,21 @@ module Risc
# show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall, # 20
LoadConstant, SlotToReg, LoadConstant, OperatorInstruction, IsNotZero,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 30
SlotToReg, Branch, SlotToReg, OperatorInstruction, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, LoadConstant, # 40
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, RegToSlot, Branch, # 50
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, Branch, RegToSlot, SlotToReg, SlotToReg, # 60
SlotToReg, FunctionReturn, Transfer, SlotToReg, SlotToReg,
Syscall, NilClass, ]
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, FunctionCall, LoadConstant, # 20
SlotToReg, LoadConstant, OperatorInstruction, IsNotZero, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, SlotToReg, # 30
Branch, OperatorInstruction, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 40
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg, # 50
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
Branch, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 60
Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal 10 , get_return
end
def base_ticks(num)
main_ticks(21 + num)
main_ticks(20 + num)
end
def test_load_factory
lod = base_ticks( 0 )

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@ -12,22 +12,21 @@ module Risc
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall, # 20
LoadConstant, SlotToReg, LoadConstant, OperatorInstruction, IsNotZero,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 30
SlotToReg, Branch, ByteToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, # 40
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, RegToSlot, Branch, SlotToReg, # 50
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
Branch, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 60
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall,
NilClass, ]
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, FunctionCall, LoadConstant, # 20
SlotToReg, LoadConstant, OperatorInstruction, IsNotZero, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, ByteToReg, # 30
Branch, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot, # 40
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, SlotToReg,
RegToSlot, Branch, SlotToReg, SlotToReg, RegToSlot, # 50
LoadConstant, SlotToReg, RegToSlot, RegToSlot, Branch,
SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer, # 60
SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal "H".ord , get_return
end
def test_byte_to_reg
done = main_ticks(33)
done = main_ticks(30)
assert_equal ByteToReg , done.class
assert_equal "H".ord , @interpreter.get_register(done.register)
end

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@ -13,22 +13,21 @@ module Risc
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall, # 20
LoadConstant, SlotToReg, LoadConstant, OperatorInstruction, IsNotZero,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 30
SlotToReg, Branch, SlotToReg, OperatorInstruction, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, LoadConstant, # 40
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, RegToSlot, Branch, # 50
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, Branch, RegToSlot, SlotToReg, SlotToReg, # 60
SlotToReg, FunctionReturn, Transfer, SlotToReg, SlotToReg,
Syscall, NilClass, ]
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, FunctionCall, LoadConstant, # 20
SlotToReg, LoadConstant, OperatorInstruction, IsNotZero, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, SlotToReg, # 30
Branch, OperatorInstruction, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 40
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg, # 50
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
Branch, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 60
Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal 1 , get_return
end
def test_op
op = main_ticks(34)
op = main_ticks(32)
assert_equal OperatorInstruction , op.class
assert_equal :- , op.operator
assert_equal :r2 , op.left.symbol
@ -37,10 +36,10 @@ module Risc
assert_equal 5 , @interpreter.get_register(:r3)
end
def test_return
ret = main_ticks(62)
ret = main_ticks(60)
assert_equal FunctionReturn , ret.class
assert_equal :r1 , ret.register.symbol
assert_equal 23088 , @interpreter.get_register(ret.register)
assert_equal 22816 , @interpreter.get_register(ret.register)
end
end
end

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@ -13,18 +13,17 @@ module Risc
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall, # 20
LoadConstant, SlotToReg, LoadConstant, OperatorInstruction, IsNotZero,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 30
SlotToReg, Branch, SlotToReg, OperatorInstruction, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, LoadConstant, # 40
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, RegToSlot, Branch, # 50
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, Branch, RegToSlot, SlotToReg, SlotToReg, # 60
SlotToReg, FunctionReturn, Transfer, SlotToReg, SlotToReg,
Syscall, NilClass, ]
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, FunctionCall, LoadConstant, # 20
SlotToReg, LoadConstant, OperatorInstruction, IsNotZero, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, SlotToReg, # 30
Branch, OperatorInstruction, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 40
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg, # 50
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
Branch, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 60
Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal 0 , get_return
end
def test_zero
@ -32,7 +31,7 @@ module Risc
assert @interpreter.flags[:zero]
end
def test_op
op = main_ticks(34)
op = main_ticks(32)
assert_equal OperatorInstruction , op.class
assert_equal :r2 , op.left.symbol
assert_equal :r3 , op.right.symbol

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@ -10,20 +10,20 @@ module Risc
end
def test_chain
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, FunctionCall, # 20
LoadConstant, SlotToReg, LoadConstant, OperatorInstruction, IsNotZero,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 30
SlotToReg, Branch, SlotToReg, OperatorInstruction, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, LoadConstant, # 40
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, FunctionReturn, SlotToReg, RegToSlot, Branch, # 50
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, Branch, RegToSlot, SlotToReg, SlotToReg, # 60
SlotToReg, FunctionReturn, Transfer, SlotToReg, SlotToReg,
Syscall, NilClass, ]
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, FunctionCall, LoadConstant, # 20
SlotToReg, LoadConstant, OperatorInstruction, IsNotZero, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, SlotToReg, # 30
Branch, OperatorInstruction, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 40
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg, # 50
RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
Branch, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 60
Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal 10 , get_return
end
def base_ticks(num)
@ -35,28 +35,24 @@ module Risc
assert_equal 5 , lod.constant.value
end
def test_load_receiver
sl = base_ticks( 7 )
sl = base_ticks( 6 )
assert_slot_to_reg( sl , :r0 , 2 , :r2)
end
def test_reduce_receiver
sl = base_ticks( 8 )
sl = base_ticks( 7 )
assert_slot_to_reg( sl , :r2 , 2 , :r2)
end
def test_slot_args #load args from message
sl = base_ticks( 9 )
assert_slot_to_reg( sl , :r0 , 8 , :r3)
end
def test_slot_arg_int #load arg 1, destructively from args
sl = base_ticks( 10 )
assert_slot_to_reg( sl , :r3 , 1 , :r3)
sl = base_ticks( 8 )
assert_slot_to_reg( sl , :r0 , 9 , :r3)
end
def test_reduce_arg
sl = base_ticks( 12 )
sl = base_ticks( 9 )
assert_slot_to_reg( sl , :r3 , 2 , :r3)
assert_equal 5 , @interpreter.get_register(:r3)
end
def test_op
op = base_ticks(13)
op = base_ticks(11)
assert_equal OperatorInstruction , op.class
assert_equal :+ , op.operator
assert_equal :r2 , op.left.symbol
@ -65,19 +61,19 @@ module Risc
assert_equal 5 , @interpreter.get_register(:r3)
end
def test_move_res_to_int
int = base_ticks( 14 )
int = base_ticks( 12 )
assert_reg_to_slot( int , :r2 , :r1 , 2)
end
def test_move_int_to_reg
int = base_ticks( 15 )
int = base_ticks( 13 )
assert_reg_to_slot( int , :r1 , :r0 , 5)
end
def test_move_fix_to_result
sl = base_ticks( 16 )
sl = base_ticks( 14 )
assert_slot_to_reg( sl , :r0 , 5 , :r1)
end
def test_start_return_sequence
sl = base_ticks( 17 )
sl = base_ticks( 15 )
assert_slot_to_reg( sl , :r0 , 6 , :r2)
end
end

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@ -13,21 +13,20 @@ module Risc
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, LoadConstant, SlotToReg, # 10
RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, SlotToReg, RegToSlot, LoadConstant, # 20
SlotToReg, RegToSlot, SlotToReg, FunctionCall, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg, # 30
SlotToReg, RegToByte, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg, # 40
SlotToReg, SlotToReg, FunctionReturn, SlotToReg, RegToSlot,
Branch, SlotToReg, SlotToReg, Branch, RegToSlot, # 50
LoadConstant, SlotToReg, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, SlotToReg, # 60
SlotToReg, Syscall, NilClass, ]
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot, # 20
SlotToReg, FunctionCall, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, SlotToReg, RegToByte, SlotToReg, # 30
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, # 40
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, Branch, SlotToReg, RegToSlot, # 50
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
Transfer, SlotToReg, SlotToReg, Syscall, NilClass, ]
assert_equal "K".ord , get_return
end
def test_reg_to_byte
done = main_ticks(32)
done = main_ticks(29)
assert_equal RegToByte , done.class
assert_equal "K".ord , @interpreter.get_register(done.register)
end

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@ -11,7 +11,7 @@ module Risc
def test_simple_collect
objects = Collector.collect_space(@linker)
assert_equal 587 , objects.length , objects.length.to_s
assert_equal 602 , objects.length , objects.length.to_s
end
def test_collect_all_types
@ -55,7 +55,7 @@ module Risc
def test_simple_collect
objects = Collector.collect_space(@linker)
assert_equal 2387, objects.length , objects.length.to_s
assert_equal 2402, objects.length , objects.length.to_s
end
def test_integer_positions

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@ -55,7 +55,7 @@ module Risc
end
def test_pc1
@interpreter.tick
assert_equal 22888 , @interpreter.pc
assert_equal 22616 , @interpreter.pc
end
def test_tick2
@interpreter.tick
@ -69,7 +69,7 @@ module Risc
def test_pc2
@interpreter.tick
@interpreter.tick
assert_equal 22892 , @interpreter.pc
assert_equal 22620 , @interpreter.pc
end
def ttest_tick_14_jump
30.times { @interpreter.tick ;puts @interpreter.instruction.class}

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@ -25,7 +25,7 @@ module Risc
assert_equal 0 , Position.get(@linker.cpu_init).at
end
def test_cpu_at
assert_equal "0x565c" , Position.get(@linker.cpu_init.first).to_s
assert_equal "0x576c" , Position.get(@linker.cpu_init.first).to_s
end
def test_cpu_label
assert_equal Position , Position.get(@linker.cpu_init.first).class