moved registers to machine, changed return to 0 (from 7) and erased all integer references to registers
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@ -9,6 +9,20 @@ require_relative "constants"
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module Arm
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class ArmMachine < Vm::RegisterMachine
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# The constants are here for readablility, the code uses access functions below
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RETURN_REG = :r0
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TYPE_REG = :r1
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RECEIVER_REG = :r2
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def return_register
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RETURN_REG
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end
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def type_register
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TYPE_REG
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end
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def receiver_register
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RECEIVER_REG
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end
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def integer_equals block , left , right
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block << cmp( left , right )
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@ -106,11 +120,11 @@ module Arm
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end
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def syscall block , num
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sys_and_ret = Vm::Integer.new( Vm::Function::RETURN_REG )
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#small todo, is this actually correct for all (that they return int)
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sys_and_ret = Vm::Integer.new( Vm::RegisterMachine.instance.return_register )
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block << mov( sys_and_ret , num )
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block << swi( 0 )
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#small todo, is this actually correct for all (that they return int)
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block << mov( sys_and_ret , :r0 ) # syscall returns in r0, more to our return
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block << mov( sys_and_ret , return_register ) # syscall returns in r0, more to our return
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#todo should write type into r0 according to syscall
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sys_and_ret
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end
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@ -12,10 +12,10 @@ module Arm
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@immediate = 0
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@rn = :r0 # register zero = zero bit pattern
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raise inspect if to.is_a?(Vm::Value) and
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from.is_a?(Vm::Value) and
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!@attributes[:shift_lsr] and
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to.register_symbol == from.register_symbol
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# NO-OP -> pass raise inspect if to.is_a?(Vm::Value) and
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# from.is_a?(Vm::Value) and
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# !@attributes[:shift_lsr] and
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# to.register_symbol == from.register_symbol
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raise "uups " if @to.register_symbol == :rr1
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end
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