fix slot_load for higher order left arguments
needed for getting args or frame of the target, for assigns fixed ripples in tests
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483a7c4467
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@ -54,6 +54,14 @@ module Mom
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when Symbol
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left = Risc.message_reg
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left_index = Risc.resolve_to_index(@left.known_object , @left.slots.first)
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if @left.slots.length > 1
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# swap the existing target (with a new reg) and update the index
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new_left = compiler.use_reg( type )
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const << Risc::SlotToReg.new( self , left ,left_index, new_left)
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left = new_left
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left_index = resolve_to_index(@left.slots[0] , @left.slots[1] ,compiler)
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raise "more slots not implemented #{@left.slots}" if @left.slots.length > 2
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end
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when Parfait::CacheEntry
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left = compiler.use_reg( :int )
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left_index = Risc.resolve_to_index(:cache_entry , @left.slots.first)
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@ -61,8 +69,7 @@ module Mom
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raise "We have left #{@left.known_object}"
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end
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const << Risc.reg_to_slot(self, right , left, left_index)
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compiler.release_reg(left) unless @left.known_object.is_a?(Symbol)
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compiler.release_reg(right)
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compiler.reset_regs
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return const
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end
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@ -70,6 +77,8 @@ module Mom
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case object
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when :frame
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type = compiler.method.frame
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when :message , :next_message
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type = Parfait.object_space.get_class_by_name(:Message).instance_type
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when :arguments
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type = compiler.method.arguments
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when :receiver
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@ -89,7 +98,7 @@ module Mom
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# The first element is either a known type name (Capitalized symbol of the class name) ,
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# or the symbol :message
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# And subsequent symbols must be instance variables on the previous type.
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# Examples: [:message , :receiver] or [:Space : :next_message]
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# Examples: [:message , :receiver] or [:Space , :next_message]
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def initialize( object , slots)
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@known_object , @slots = object , slots
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slot = [slot] unless slot.is_a?(Array)
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@ -7,7 +7,7 @@ module Risc
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def setup
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super
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@input = "arg = 5"
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@expect = [LoadConstant, RegToSlot]
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@expect = [LoadConstant, SlotToReg, RegToSlot]
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end
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def test_local_assign_instructions
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assert_nil msg = check_nil , msg
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@ -20,7 +20,12 @@ module Risc
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def test_slot_move
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produced = produce_body
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assert_equal produced.next.register , produced.register
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assert_equal produced.next(2).register , produced.register
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end
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def test_load_args_from_message
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produced = produce_body
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assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf
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assert_equal 9 , produced.next.index , produced.next.to_rxf
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end
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end
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@ -7,7 +7,7 @@ module Risc
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def setup
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super
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@input = "@ivar = 5"
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@expect = [LoadConstant, RegToSlot]
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@expect = [LoadConstant, SlotToReg, RegToSlot]
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end
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def test_local_assign_instructions
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assert_nil msg = check_nil , msg
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@ -20,7 +20,13 @@ module Risc
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def test_slot_move
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produced = produce_body
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assert_equal produced.next.register , produced.register
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assert_equal produced.next.next.register , produced.register
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end
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def test_load_self_from_message
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produced = produce_body
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assert_equal :r0 , produced.next.array.symbol , produced.next.to_rxf
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assert_equal 3 , produced.next.index , produced.next.to_rxf
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end
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end
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@ -7,7 +7,7 @@ module Risc
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def setup
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super
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@input = "local = arg"
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@expect = [SlotToReg, SlotToReg, RegToSlot]
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@expect = [SlotToReg, SlotToReg, SlotToReg, RegToSlot]
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end
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def test_local_assign_instructions
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assert_nil msg = check_nil , msg
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@ -15,8 +15,17 @@ module Risc
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def test_slot_move
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produced = produce_body
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assert_equal produced.next.next.register , produced.register
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assert_equal produced.next(3).register , produced.register
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end
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def test_load_args_from_message
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produced = produce_body
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assert_equal :r0 , produced.array.symbol , produced.next.to_rxf
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assert_equal 9 , produced.index , produced.next.to_rxf
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end
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def test_load_frame_from_message
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produced = produce_body
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assert_equal :r0 , produced.next(2).array.symbol , produced.next.to_rxf
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assert_equal 2 , produced.next.index , produced.next.to_rxf
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end
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end
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end
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@ -7,7 +7,7 @@ module Risc
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def setup
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super
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@input = "r = 5"
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@expect = [LoadConstant, RegToSlot]
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@expect = [LoadConstant,SlotToReg, RegToSlot]
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end
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def test_local_assign_instructions
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assert_nil msg = check_nil , msg
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@ -20,7 +20,7 @@ module Risc
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def test_slot_move
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produced = produce_body
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assert_equal produced.next.register , produced.register
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assert_equal produced.next(2).register , produced.register
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end
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end
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@ -7,7 +7,8 @@ module Risc
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def setup
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super
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@input = "@ivar = 5 ; r = @ivar"
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@expect = [LoadConstant, RegToSlot, SlotToReg, SlotToReg, RegToSlot]
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@expect = [LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg, SlotToReg ,
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RegToSlot]
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end
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def test_local_assign_instructions
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assert_nil msg = check_nil , msg
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@ -20,7 +21,7 @@ module Risc
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def test_slot_move
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produced = produce_body
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assert_equal produced.next.register , produced.register
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assert_equal produced.next(2).register , produced.register
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end
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end
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@ -7,8 +7,8 @@ module Risc
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def setup
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super
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@input = "r = 5.mod4"
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@expect = [Label, LoadConstant, RegToSlot, Label, Label, SlotToReg ,
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RegToSlot]
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@expect = [Label, LoadConstant, SlotToReg, RegToSlot, Label, Label ,
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SlotToReg, SlotToReg, RegToSlot]
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end
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def test_local_assign_instructions
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assert_nil msg = check_nil , msg
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