refactor logic instruction
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@ -3,7 +3,7 @@ module Arm
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include Constants
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include Constants
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include Attributed
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include Attributed
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# result = left op right
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# result = left op right #or constant loading
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#
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#
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# Logic instruction are your basic operator implementation. But unlike the (normal) code we write
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# Logic instruction are your basic operator implementation. But unlike the (normal) code we write
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# these Instructions must have "place" to write their results. Ie when you write 4 + 5 in ruby
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# these Instructions must have "place" to write their results. Ie when you write 4 + 5 in ruby
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@ -16,55 +16,16 @@ module Arm
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@right = right
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@right = right
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@attributes[:update_status] = 1 if @attributes[:update_status] == nil
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@attributes[:update_status] = 1 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@operand = 0
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raise "Left arg must be given #{inspect}" unless @left
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raise "Left arg must be given #{inspect}" unless @left
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@immediate = 0
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end
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end
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attr_accessor :result , :left , :right
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attr_accessor :result , :left , :right
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def assemble(io)
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def assemble(io)
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# don't overwrite instance variables, to make assembly repeatable
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left , right = determine_operands
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left = @left
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immediate = 1 # default, unless register (below)
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operand = @operand
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immediate = @immediate
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right = @right
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if( @left.is_a?(Parfait::Object) or @left.is_a?(Register::Label) or
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(@left.is_a?(Symbol) and !Register::RegisterValue.look_like_reg(@left)))
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# do pc relative addressing with the difference to the instuction
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# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
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right = @left.position - self.position - 8
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if( (right < 0) && ((opcode == :add) || (opcode == :sub)) )
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right *= -1 # this works as we never issue sub only add
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set_opcode :sub # so (as we can't change the sign permanently) we can change the opcode
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end # and the sign even for sub (becuase we created them)
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raise "No negatives implemented #{self} #{right} " if right < 0
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left = :pc
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end
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if (right.is_a?(Numeric))
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if (right.is_a?(Numeric))
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if (right.fits_u8?)
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operand = handle_numeric(right)
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# no shifting needed
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operand = right
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immediate = 1
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elsif (op_with_rot = calculate_u8_with_rr(right))
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operand = op_with_rot
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immediate = 1
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else
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#TODO this is copied from MoveInstruction, should rework
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unless @extra
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@extra = 1
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#puts "RELINK L at #{self.position.to_s(16)}"
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raise ::Register::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
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end
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# now we can do the actual breaking of instruction, by splitting the operand
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first = right & 0xFFFFFF00
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operand = calculate_u8_with_rr( first )
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raise "no fit for #{right}" unless operand
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immediate = 1
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# use sub for sub and add for add, ie same as opcode
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@extra = ArmMachine.send( opcode , result , result , (right & 0xFF) )
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end
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elsif (right.is_a?(Symbol) or right.is_a?(::Register::RegisterValue))
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elsif (right.is_a?(Symbol) or right.is_a?(::Register::RegisterValue))
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operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
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operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
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immediate = 0 # ie not immediate is register
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immediate = 0 # ie not immediate is register
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@ -91,15 +52,61 @@ module Arm
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val |= shift(instuction_class , 12 + 4 + 4 + 1 + 4 + 1)
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val |= shift(instuction_class , 12 + 4 + 4 + 1 + 4 + 1)
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val |= shift(cond_bit_code , 12 + 4 + 4 + 1 + 4 + 1 + 2)
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val |= shift(cond_bit_code , 12 + 4 + 4 + 1 + 4 + 1 + 2)
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io.write_uint32 val
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io.write_uint32 val
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assemble_extra
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end
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# Arm can't load any large (over 1024) numbers, or larger with fancy shifting,
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# but then the lower bits must be 0's. Especially in constant loading random large numbers
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# happen, and so they are split into two instructions. An exection is thrown, that triggers
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# some position handling and an @extra add instruction generated.
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def handle_numeric(right)
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if (right.fits_u8?)
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operand = right # no shifting needed
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elsif (op_with_rot = calculate_u8_with_rr(right))
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operand = op_with_rot
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else
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unless @extra
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@extra = 1
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#puts "RELINK L at #{self.position.to_s(16)}"
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raise ::Register::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
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end
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# now we can do the actual breaking of instruction, by splitting the operand
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operand = calculate_u8_with_rr( right & 0xFFFFFF00 )
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raise "no fit for #{right}" unless operand
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# use sub for sub and add for add, ie same as opcode
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@extra = ArmMachine.send( opcode , result , result , (right & 0xFF) )
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end
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return operand
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end
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# don't overwrite instance variables, to make assembly repeatable
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# this also loads constants, which are issued as pc relative adds
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def determine_operands
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if( @left.is_a?(Parfait::Object) or @left.is_a?(Register::Label) or
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(@left.is_a?(Symbol) and !Register::RegisterValue.look_like_reg(@left)))
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# do pc relative addressing with the difference to the instuction
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# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
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right = @left.position - self.position - 8
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if( (right < 0) && ((opcode == :add) || (opcode == :sub)) )
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right *= -1 # this works as we never issue sub only add
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set_opcode :sub # so (as we can't change the sign permanently) we can change the opcode
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end # and the sign even for sub (becuase we created them)
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raise "No negatives implemented #{self} #{right} " if right < 0
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return :pc , right
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else
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return @left , @right
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end
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end
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# by now we have the extra add so assemble that
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# by now we have the extra add so assemble that
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if(@extra)
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def assemble_extra
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return unless @extra
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if(@extra == 1) # unles things have changed and then we add a noop (to keep the length same)
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if(@extra == 1) # unles things have changed and then we add a noop (to keep the length same)
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@extra = ArmMachine.mov( :r1 , :r1 )
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@extra = ArmMachine.mov( :r1 , :r1 )
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end
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end
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@extra.assemble(io)
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@extra.assemble(io)
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#puts "Assemble extra at #{val.to_s(16)}"
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#puts "Assemble extra at #{val.to_s(16)}"
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end
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end
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end
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def byte_length
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def byte_length
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@extra ? 8 : 4
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@extra ? 8 : 4
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