remove link exception raise

need to fix move logic next
This commit is contained in:
Torsten Ruger
2018-05-05 23:55:50 +03:00
parent 40f4bfc287
commit 6b7e1e3932
5 changed files with 16 additions and 86 deletions

View File

@ -21,6 +21,11 @@ module Arm
ret
end
def insert(instruction)
super
@next.set_position( Risc::Position.position(self) + self.byte_length , 0) #FIXME
end
def set_position( position , count )
Risc::Position.set_position(self,position)
position += byte_length

View File

@ -69,16 +69,13 @@ module Arm
else
unless @extra
@extra = 1
#puts "RELINK L at #{self.position.to_s(16)}"
extra = ArmMachine.send( opcode , result , result , 0 ) #noop
extra.set_next( @next )
@next = extra
raise ::Risc::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
# puts "RELINK L at #{Risc::Position.position(self)}"
# use sub for sub and add for add, ie same as opcode
insert ArmMachine.send( opcode , result , result , 0 ) #noop
end
# now we can do the actual breaking of instruction, by splitting the operand
operand = calculate_u8_with_rr( right & 0xFFFFFF00 )
raise "no fit for #{right}" unless operand
# use sub for sub and add for add, ie same as opcode
raise "no fit for #{right} in #{self}" unless operand
@next.set_value(right & 0xFF )
end
return operand

View File

@ -65,13 +65,11 @@ module Arm
if (op_with_rot = calculate_u8_with_rr(right))
return op_with_rot
end
raise "No negatives implemented #{right} " if right < 0
raise "Negatives not implemented #{right} " if right < 0
unless @extra
@extra = 1 # puts "RELINK M at #{self.position.to_s(16)}"
extra = ArmMachine.add( to , to , 0 ) #noop that we change below
extra.set_next(@next)
@next = extra
raise ::Risc::LinkException.new("cannot fit numeric literal argument in operand #{right.inspect}")
puts "RELINK M at #{Risc::Position.position(self)}"
@extra = 1
insert ArmMachine.add( to , to , 0 ) #noop that we change below
end
# now we can do the actual breaking of instruction, by splitting the operand
operand = calculate_u8_with_rr( right & 0xFFFFFF00 )