rename Position get/set

This commit is contained in:
Torsten Ruger
2018-05-06 20:04:02 +03:00
parent e89c4d1ce1
commit 68fb9b1bdc
12 changed files with 41 additions and 37 deletions

View File

@ -47,12 +47,12 @@ module Arm
# relative addressing for jumps/calls
# but because of the arm "theoretical" 3- stage pipeline,
# we have to subtract 2 words (fetch/decode)
arg = Risc::Position.position(@first) - Risc::Position.position(self) - 8
arg = Risc::Position.get(@first) - Risc::Position.get(self) - 8
when Parfait::BinaryCode
# But, for methods, this happens to be the size of the object header,
# so there it balances out, but not blocks
# have to use the code, not the method object for methods
arg = Risc::Position.position(@first) - Risc::Position.position(self) + 4
arg = Risc::Position.get(@first) - Risc::Position.get(self) + 4
else
arg = @first
end

View File

@ -23,12 +23,12 @@ module Arm
def insert(instruction)
super
my_pos = Risc::Position.position(self)
my_pos = Risc::Position.get(self)
@next.set_position( my_pos + self.byte_length , 0 , my_pos.binary)
end
def set_position( position , count , extra = nil)
Risc::Position.set_position(self,position , extra)
Risc::Position.set(self,position , extra)
position += byte_length
if self.next
count += 1 #assumes 4 byte instructions, as does the whole setup

View File

@ -69,7 +69,7 @@ module Arm
else
unless @extra
@extra = 1
# puts "RELINK L at #{Risc::Position.position(self)}"
# puts "RELINK L at #{Risc::Position.get(self)}"
# use sub for sub and add for add, ie same as opcode
insert ArmMachine.send( opcode , result , result , 0 ) #noop
end
@ -92,7 +92,7 @@ module Arm
(@left.is_a?(Symbol) and !Risc::RiscValue.look_like_reg(@left)))
# do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
right = Risc::Position.position(@left) - Risc::Position.position(self) - 8
right = Risc::Position.get(@left) - Risc::Position.get(self) - 8
if( (right < 0) && ((opcode == :add) || (opcode == :sub)) )
right *= -1 # this works as we never issue sub only add
set_opcode :sub # so (as we can't change the sign permanently) we can change the opcode

View File

@ -67,7 +67,7 @@ module Arm
end
raise "Negatives not implemented #{right} " if right < 0
unless @extra
puts "RELINK M at #{Risc::Position.position(self)}"
puts "RELINK M at #{Risc::Position.get(self)}"
@extra = 1
insert ArmMachine.add( to , to , 0 ) #noop that we change below
end