From 6267bf3ad0fa447a4a2bf50e17276aea63488095 Mon Sep 17 00:00:00 2001
From: Torsten <torsten@rubydesign.fi>
Date: Mon, 9 Mar 2020 13:51:41 +0200
Subject: [PATCH] fix slot_to_reg to allow register indexes

we mostly use pre-calculated indexes, ie integers
but registers are allowed (in arm/risc), so we try to check the registers type at least is right.
The return is really a machine word, but we call it Object (yes, more work that way)
---
 lib/risc/instructions/slot_to_reg.rb       |  8 +++++++-
 lib/risc/register_slot.rb                  | 14 ++++----------
 test/risc/instructions/test_slot_to_reg.rb |  8 ++++++++
 3 files changed, 19 insertions(+), 11 deletions(-)

diff --git a/lib/risc/instructions/slot_to_reg.rb b/lib/risc/instructions/slot_to_reg.rb
index e7e4ffcc..fe2d6b78 100644
--- a/lib/risc/instructions/slot_to_reg.rb
+++ b/lib/risc/instructions/slot_to_reg.rb
@@ -21,7 +21,13 @@ module Risc
     raise "Register #{array}" if RegisterValue.look_like_reg(array.symbol)
     new_name = "#{array.symbol}.#{index.to_s.downcase}".to_sym
     index = array.resolve_index(index) if index.is_a?(Symbol)
-    type = array.type_at(index)
+    if( index.is_a?(Integer))
+      type = array.type_at(index)
+    else
+      raise "must be integer index #{index}" unless index.type.name == "Integer_Type"
+      type = Parfait.object_space.get_type_by_class_name(:Object)
+      new_name = "#{array.symbol}.indexed".to_sym
+    end
     #puts "Slot for #{array.symbol}@ index #{index} is #{type}"
     to = RegisterValue.new( new_name , type )
     SlotToReg.new( source , array , index , to)
diff --git a/lib/risc/register_slot.rb b/lib/risc/register_slot.rb
index d82ef2c7..88759131 100644
--- a/lib/risc/register_slot.rb
+++ b/lib/risc/register_slot.rb
@@ -23,15 +23,9 @@ module Risc
     # fullfil the objects purpose by creating a RegToSlot instruction from
     # itself (the slot) and the register given
     def <<( reg )
-      case reg
-      when RegisterValue
-        to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg)
-      when RegisterSlot
-        reg = to_reg()
-        to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg)
-      else
-        raise "not reg value or slot #{reg}"
-      end
+      reg = reg.to_reg() if reg.is_a?( RegisterSlot )
+      raise "not reg value or slot #{reg}" unless reg.is_a?(RegisterValue)
+      to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg)
     end
 
     # for chaining the array operator is defined here too.
@@ -59,7 +53,7 @@ module Risc
     # the register is created, and the slot_to_reg instruction added to the
     # compiler. the return is a bit like @register[@index]
     def to_reg()
-      source = "reduce #{@register.symbol}[@index]"
+      source = "reduce #{@register.symbol}[#{@index}]"
       slot_to_reg = Risc.slot_to_reg(source , register, index)
       if compiler
         compiler.add_code(slot_to_reg)
diff --git a/test/risc/instructions/test_slot_to_reg.rb b/test/risc/instructions/test_slot_to_reg.rb
index 3057a3f7..de672ac3 100644
--- a/test/risc/instructions/test_slot_to_reg.rb
+++ b/test/risc/instructions/test_slot_to_reg.rb
@@ -14,5 +14,13 @@ module Risc
     def test_slot_reg
       assert_equal :"message.type" , slot.register.symbol
     end
+    def test_reg_as_index
+      reg = RegisterValue.new(:name , :Integer)
+      Risc.slot_to_reg("source" , Risc.message_named_reg , reg)
+    end
+    def test_reg_as_index_fail
+      reg = Risc.message_named_reg
+      assert_raises {Risc.slot_to_reg("source" , reg , reg)}
+    end
   end
 end