reducing the label's int for return

placing the raw address in the register to jump to
puts the extra instruction at the risc level (not arm), thus changing a
lot of (brittle?) tests
This commit is contained in:
Torsten Ruger
2018-05-30 12:54:40 +03:00
parent 01a2911483
commit 53107d3ef8
28 changed files with 202 additions and 176 deletions

View File

@ -14,7 +14,7 @@ module Risc
check_main_chain [LoadConstant, LoadConstant, OperatorInstruction, IsZero, LoadConstant,
OperatorInstruction, IsZero, LoadConstant, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, Branch, SlotToReg,
FunctionReturn, Transfer, Syscall, NilClass]
SlotToReg, FunctionReturn, Transfer, Syscall, NilClass]
assert_equal Parfait::Word , get_return.class
assert_equal "then" , get_return.to_string
end
@ -39,7 +39,7 @@ module Risc
assert check.label.name.start_with?("false_label") , check.label.name
end
def test_exit
done = main_ticks(18)
done = main_ticks(19)
assert_equal Syscall , done.class
end
end

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@ -11,7 +11,7 @@ module Risc
def test_if
#show_main_ticks # get output of what is in main
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, Branch, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
@ -20,16 +20,16 @@ module Risc
SlotToReg, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
IsMinus, IsZero, LoadConstant, RegToSlot, SlotToReg,
Branch, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, LoadConstant, OperatorInstruction, IsZero, LoadConstant,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, FunctionReturn, Transfer, Syscall,
NilClass]
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsZero,
LoadConstant, RegToSlot, SlotToReg, SlotToReg, Branch,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
Transfer, Syscall, NilClass]
assert_equal Parfait::Word , get_return.class
assert_equal "else" , get_return.to_string
end
def test_exit
done = main_ticks(65)
done = main_ticks(67)
assert_equal Syscall , done.class
end
end

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@ -11,7 +11,7 @@ module Risc
def test_if
#show_main_ticks # get output of what is in main
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, Branch, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
@ -20,16 +20,17 @@ module Risc
SlotToReg, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
IsMinus, LoadConstant, Branch, RegToSlot, SlotToReg,
SlotToReg, Branch, RegToSlot, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, LoadConstant, OperatorInstruction, IsZero, LoadConstant,
OperatorInstruction, IsZero, LoadConstant, Branch, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
FunctionReturn, Transfer, Syscall, NilClass]
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsZero,
LoadConstant, OperatorInstruction, IsZero, LoadConstant, Branch,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, Syscall,
NilClass]
assert_equal Parfait::Word , get_return.class
assert_equal "then" , get_return.to_string
end
def test_exit
done = main_ticks(68)
done = main_ticks(70)
assert_equal Syscall , done.class
end
end

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@ -20,16 +20,16 @@ module Risc
SlotToReg, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
IsMinus, IsZero, LoadConstant, RegToSlot, SlotToReg,
Branch, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, LoadConstant, OperatorInstruction, IsZero, LoadConstant,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, FunctionReturn, Transfer, Syscall,
NilClass]
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsZero,
LoadConstant, RegToSlot, SlotToReg, SlotToReg, Branch,
RegToSlot, SlotToReg, SlotToReg, SlotToReg, FunctionReturn,
Transfer, Syscall, NilClass]
assert_equal Parfait::Word , get_return.class
assert_equal "else" , get_return.to_string
end
def test_exit
done = main_ticks(65)
done = main_ticks(67)
assert_equal Syscall , done.class
end
end

View File

@ -20,16 +20,17 @@ module Risc
SlotToReg, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
IsMinus, LoadConstant, Branch, RegToSlot, SlotToReg,
SlotToReg, Branch, RegToSlot, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, LoadConstant, OperatorInstruction, IsZero, LoadConstant,
OperatorInstruction, IsZero, LoadConstant, Branch, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
FunctionReturn, Transfer, Syscall, NilClass]
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsZero,
LoadConstant, OperatorInstruction, IsZero, LoadConstant, Branch,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, FunctionReturn, Transfer, Syscall,
NilClass]
assert_equal Parfait::Word , get_return.class
assert_equal "then" , get_return.to_string
end
def test_exit
done = main_ticks(68)
done = main_ticks(70)
assert_equal Syscall , done.class
end
end