update to new syntax and patch tests

basic semantics remain, but have to improve test for new functionality
that has to be written for new branch types
This commit is contained in:
Torsten Ruger
2015-10-19 15:31:48 +03:00
parent bdcd0f297d
commit 50379a1fea
8 changed files with 37 additions and 38 deletions

View File

@ -8,7 +8,7 @@ class TestIf < MiniTest::Test
class Object
int main()
int n = 10
if( n - 12)
if_plus( n - 12)
return 3
else
return 4
@ -25,7 +25,7 @@ HERE
class Object
int main()
int n = 10
if(8 - n )
if_minus(8 - n )
"10".putstring()
end
end
@ -41,7 +41,7 @@ HERE
@string_input = <<HERE
class Object
int itest(int n)
if( n - 12)
if_zero( n - 12)
"then".putstring()
else
"else".putstring()

View File

@ -8,7 +8,7 @@ class TestIfStatement < MiniTest::Test
@string_input = <<HERE
class Object
int main()
if( 10 < 12)
if_plus( 10 < 12)
return 3
else
return 4
@ -28,7 +28,7 @@ HERE
@string_input = <<HERE
class Object
int main()
if( 10 < 12)
if_minus( 10 < 12)
return 3
end
end

View File

@ -9,7 +9,7 @@ module Register
@string_input = <<HERE
class Object
int main()
while(1)
while_plus(1)
return 3
end
end
@ -25,7 +25,7 @@ HERE
class Object
int main()
int n = 5
while(n > 0)
while_minus(n > 0)
n = n - 1
end
end
@ -43,7 +43,7 @@ HERE
class Object
int main()
int n = 10
while( n > 5)
while_notzero( n > 5)
n = n + 1
return n
end

View File

@ -8,19 +8,19 @@ class AddTest < MiniTest::Test
@string_input = <<HERE
class Integer < Object
Word digit( int rest )
if( rest == 5 )
if_zero( rest == 5 )
return "5"
end
if( rest == 1 )
if_zero( rest == 1 )
return "1"
end
if( rest == 2 )
if_zero( rest == 2 )
return "2"
end
if( rest == 3 )
if_zero( rest == 3 )
return "3"
end
if( rest == 4 )
if_zero( rest == 4 )
return "4"
end
end
@ -29,7 +29,7 @@ class Integer < Object
div = self / 10
int rest
rest = self - div
if( rest - 0)
if_nonzero( rest )
rest = self.digit( rest )
str = str + rest
else
@ -58,7 +58,7 @@ HERE
# Phisol::Compiler.compile( statements , Virtual.machine.space.get_main )
@interpreter = Interpreter::Interpreter.new
@interpreter.start Virtual.machine.init
# show_ticks # get output of what is
#show_ticks # get output of what is
["AlwaysBranch","LoadConstant","GetSlot","SetSlot","RegisterTransfer",
"FunctionCall","SaveReturn","GetSlot","LoadConstant","SetSlot",
"LoadConstant","SetSlot","RegisterTransfer","FunctionCall","SaveReturn",
@ -67,24 +67,23 @@ HERE
"SetSlot","RegisterTransfer","FunctionCall","SaveReturn","GetSlot",
"LoadConstant","OperatorInstruction","GetSlot","SetSlot","GetSlot",
"GetSlot","GetSlot","OperatorInstruction","GetSlot","SetSlot",
"GetSlot","GetSlot","LoadConstant","OperatorInstruction","IsZeroBranch",
"GetSlot","GetSlot","GetSlot","SetSlot","LoadConstant",
"SetSlot","GetSlot","SetSlot","RegisterTransfer","FunctionCall",
"SaveReturn","GetSlot","LoadConstant","OperatorInstruction","GetSlot",
"SetSlot","GetSlot","GetSlot","GetSlot","OperatorInstruction",
"GetSlot","SetSlot","GetSlot","GetSlot","LoadConstant",
"OperatorInstruction","IsZeroBranch","GetSlot","GetSlot","GetSlot",
"SetSlot","LoadConstant","SetSlot","GetSlot","SetSlot",
"RegisterTransfer","FunctionCall","SaveReturn","GetSlot","LoadConstant",
"OperatorInstruction","GetSlot","SetSlot","GetSlot","GetSlot",
"GetSlot","OperatorInstruction","GetSlot","SetSlot","GetSlot",
"GetSlot","LoadConstant","OperatorInstruction","IsZeroBranch","GetSlot",
"GetSlot","GetSlot","SetSlot","LoadConstant","SetSlot",
"GetSlot","SetSlot","RegisterTransfer","FunctionCall","SaveReturn",
"GetSlot","LoadConstant","OperatorInstruction","GetSlot","SetSlot",
"GetSlot","GetSlot","GetSlot","OperatorInstruction","GetSlot",
"SetSlot","GetSlot","GetSlot","LoadConstant","OperatorInstruction",
"IsZeroBranch","GetSlot","GetSlot","GetSlot"].each_with_index do |name , index|
"GetSlot","GetSlot","IsZeroBranch","GetSlot","GetSlot",
"GetSlot","SetSlot","LoadConstant","SetSlot","GetSlot",
"SetSlot","RegisterTransfer","FunctionCall","SaveReturn","GetSlot",
"LoadConstant","OperatorInstruction","GetSlot","SetSlot","GetSlot",
"GetSlot","GetSlot","OperatorInstruction","GetSlot","SetSlot",
"GetSlot","GetSlot","IsZeroBranch","GetSlot","GetSlot",
"GetSlot","SetSlot","LoadConstant","SetSlot","GetSlot",
"SetSlot","RegisterTransfer","FunctionCall","SaveReturn","GetSlot",
"LoadConstant","OperatorInstruction","GetSlot","SetSlot","GetSlot",
"GetSlot","GetSlot","OperatorInstruction","GetSlot","SetSlot",
"GetSlot","GetSlot","IsZeroBranch","GetSlot","GetSlot",
"GetSlot","SetSlot","LoadConstant","SetSlot","GetSlot",
"SetSlot","RegisterTransfer","FunctionCall","SaveReturn","GetSlot",
"LoadConstant","OperatorInstruction","GetSlot","SetSlot","GetSlot",
"GetSlot","GetSlot","OperatorInstruction","GetSlot","SetSlot",
"GetSlot","GetSlot","IsZeroBranch","GetSlot","GetSlot",
"GetSlot"].each_with_index do |name , index|
got = ticks(1)
assert got.class.name.index(name) , "Wrong class for #{index+1}, expect #{name} , got #{got}"
end