update to new syntax and patch tests
basic semantics remain, but have to improve test for new functionality that has to be written for new branch types
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@@ -8,7 +8,7 @@ class TestIf < MiniTest::Test
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class Object
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int main()
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int n = 10
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if( n - 12)
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if_plus( n - 12)
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return 3
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else
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return 4
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@@ -25,7 +25,7 @@ HERE
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class Object
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int main()
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int n = 10
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if(8 - n )
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if_minus(8 - n )
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"10".putstring()
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end
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end
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@@ -41,7 +41,7 @@ HERE
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@string_input = <<HERE
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class Object
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int itest(int n)
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if( n - 12)
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if_zero( n - 12)
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"then".putstring()
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else
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"else".putstring()
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@@ -8,7 +8,7 @@ class TestIfStatement < MiniTest::Test
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@string_input = <<HERE
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class Object
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int main()
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if( 10 < 12)
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if_plus( 10 < 12)
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return 3
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else
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return 4
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@@ -28,7 +28,7 @@ HERE
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@string_input = <<HERE
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class Object
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int main()
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if( 10 < 12)
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if_minus( 10 < 12)
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return 3
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end
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end
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@@ -9,7 +9,7 @@ module Register
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@string_input = <<HERE
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class Object
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int main()
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while(1)
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while_plus(1)
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return 3
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end
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end
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@@ -25,7 +25,7 @@ HERE
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class Object
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int main()
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int n = 5
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while(n > 0)
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while_minus(n > 0)
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n = n - 1
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end
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end
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@@ -43,7 +43,7 @@ HERE
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class Object
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int main()
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int n = 10
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while( n > 5)
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while_notzero( n > 5)
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n = n + 1
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return n
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end
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@@ -8,19 +8,19 @@ class AddTest < MiniTest::Test
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@string_input = <<HERE
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class Integer < Object
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Word digit( int rest )
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if( rest == 5 )
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if_zero( rest == 5 )
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return "5"
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end
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if( rest == 1 )
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if_zero( rest == 1 )
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return "1"
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end
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if( rest == 2 )
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if_zero( rest == 2 )
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return "2"
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end
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if( rest == 3 )
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if_zero( rest == 3 )
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return "3"
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end
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if( rest == 4 )
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if_zero( rest == 4 )
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return "4"
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end
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end
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@@ -29,7 +29,7 @@ class Integer < Object
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div = self / 10
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int rest
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rest = self - div
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if( rest - 0)
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if_nonzero( rest )
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rest = self.digit( rest )
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str = str + rest
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else
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@@ -58,7 +58,7 @@ HERE
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# Phisol::Compiler.compile( statements , Virtual.machine.space.get_main )
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@interpreter = Interpreter::Interpreter.new
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@interpreter.start Virtual.machine.init
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# show_ticks # get output of what is
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#show_ticks # get output of what is
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["AlwaysBranch","LoadConstant","GetSlot","SetSlot","RegisterTransfer",
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"FunctionCall","SaveReturn","GetSlot","LoadConstant","SetSlot",
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"LoadConstant","SetSlot","RegisterTransfer","FunctionCall","SaveReturn",
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@@ -67,24 +67,23 @@ HERE
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"SetSlot","RegisterTransfer","FunctionCall","SaveReturn","GetSlot",
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"LoadConstant","OperatorInstruction","GetSlot","SetSlot","GetSlot",
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"GetSlot","GetSlot","OperatorInstruction","GetSlot","SetSlot",
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"GetSlot","GetSlot","LoadConstant","OperatorInstruction","IsZeroBranch",
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"GetSlot","GetSlot","GetSlot","SetSlot","LoadConstant",
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"SetSlot","GetSlot","SetSlot","RegisterTransfer","FunctionCall",
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"SaveReturn","GetSlot","LoadConstant","OperatorInstruction","GetSlot",
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"SetSlot","GetSlot","GetSlot","GetSlot","OperatorInstruction",
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"GetSlot","SetSlot","GetSlot","GetSlot","LoadConstant",
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"OperatorInstruction","IsZeroBranch","GetSlot","GetSlot","GetSlot",
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"SetSlot","LoadConstant","SetSlot","GetSlot","SetSlot",
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"RegisterTransfer","FunctionCall","SaveReturn","GetSlot","LoadConstant",
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"OperatorInstruction","GetSlot","SetSlot","GetSlot","GetSlot",
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"GetSlot","OperatorInstruction","GetSlot","SetSlot","GetSlot",
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"GetSlot","LoadConstant","OperatorInstruction","IsZeroBranch","GetSlot",
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"GetSlot","GetSlot","SetSlot","LoadConstant","SetSlot",
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"GetSlot","SetSlot","RegisterTransfer","FunctionCall","SaveReturn",
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"GetSlot","LoadConstant","OperatorInstruction","GetSlot","SetSlot",
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"GetSlot","GetSlot","GetSlot","OperatorInstruction","GetSlot",
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"SetSlot","GetSlot","GetSlot","LoadConstant","OperatorInstruction",
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"IsZeroBranch","GetSlot","GetSlot","GetSlot"].each_with_index do |name , index|
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"GetSlot","GetSlot","IsZeroBranch","GetSlot","GetSlot",
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"GetSlot","SetSlot","LoadConstant","SetSlot","GetSlot",
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"SetSlot","RegisterTransfer","FunctionCall","SaveReturn","GetSlot",
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"LoadConstant","OperatorInstruction","GetSlot","SetSlot","GetSlot",
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"GetSlot","GetSlot","OperatorInstruction","GetSlot","SetSlot",
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"GetSlot","GetSlot","IsZeroBranch","GetSlot","GetSlot",
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"GetSlot","SetSlot","LoadConstant","SetSlot","GetSlot",
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"SetSlot","RegisterTransfer","FunctionCall","SaveReturn","GetSlot",
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"LoadConstant","OperatorInstruction","GetSlot","SetSlot","GetSlot",
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"GetSlot","GetSlot","OperatorInstruction","GetSlot","SetSlot",
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"GetSlot","GetSlot","IsZeroBranch","GetSlot","GetSlot",
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"GetSlot","SetSlot","LoadConstant","SetSlot","GetSlot",
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"SetSlot","RegisterTransfer","FunctionCall","SaveReturn","GetSlot",
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"LoadConstant","OperatorInstruction","GetSlot","SetSlot","GetSlot",
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"GetSlot","GetSlot","OperatorInstruction","GetSlot","SetSlot",
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"GetSlot","GetSlot","IsZeroBranch","GetSlot","GetSlot",
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"GetSlot"].each_with_index do |name , index|
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got = ticks(1)
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assert got.class.name.index(name) , "Wrong class for #{index+1}, expect #{name} , got #{got}"
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end
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