little spring clean
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@ -1,5 +1,3 @@
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require "util/eventable"
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module Risc
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# An interpreter for the register level. As the register machine is a simple model,
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@ -18,24 +16,18 @@ module Risc
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include Logging
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log_level :info
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attr_reader :instruction # current instruction or pc
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attr_reader :clock # current instruction or pc
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attr_reader :instruction , :clock # current instruction or pc
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attr_reader :registers # the registers, 16 (a hash, sym -> contents)
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attr_reader :stdout # collect the output
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attr_reader :state # running etc
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attr_reader :flags # somewhat like the lags on a cpu, hash sym => bool (zero .. . )
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attr_reader :stdout, :state , :flags # somewhat like the lags on a cpu, hash sym => bool (zero .. . )
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#start in state :stopped and set registers to unknown
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def initialize()
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@state = :stopped
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@stdout = ""
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@stdout , @clock , @state = "", 0 , :stopped
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@registers = {}
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@flags = { :zero => false , :plus => false ,
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:minus => false , :overflow => false }
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@clock = 0
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(0...12).each do |r|
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set_register "r#{r}".to_sym , "r#{r}:unknown"
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(0...12).each do |reg|
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set_register "r#{reg}".to_sym , "r#{reg}:unknown"
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end
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end
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@ -52,12 +44,12 @@ module Risc
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trigger(:state_changed , old , state )
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end
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def set_instruction( i )
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raise "set to same instruction #{i}:#{i.class}" if @instruction == i
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def set_instruction( instruction )
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raise "set to same instruction #{instruction}:#{instruction.class}" if @instruction == instruction
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old = @instruction
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@instruction = i
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trigger(:instruction_changed, old , i)
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set_state( :exited) unless i
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@instruction = instruction
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trigger(:instruction_changed, old , instruction)
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set_state( :exited) unless instruction
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end
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def get_register( reg )
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@ -79,7 +71,7 @@ module Risc
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end
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return if old === val
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reg = reg.symbol if reg.is_a? Risc::RiscValue
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val = Parfait.object_space.nil_object if( val == nil) #because that's what real code has
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val = Parfait.object_space.nil_object if val.nil? #because that's what real code has
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@registers[reg] = val
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trigger(:register_changed, reg , old , val)
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end
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@ -264,19 +256,19 @@ module Risc
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right = right.object_id unless right.is_a?(Integer)
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case @instruction.operator
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when :+
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return left + right
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left + right
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when :-
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return left - right
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left - right
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when :>>
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return left / (2**right)
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left / (2**right)
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when :<<
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return left * (2**right)
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left * (2**right)
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when :*
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return left * right
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left * right
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when :&
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return left & right
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left & right
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when :|
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return left | right
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left | right
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else
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raise "unimplemented '#{@instruction.operator}' #{@instruction}"
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end
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@ -285,7 +277,7 @@ module Risc
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def register_dump
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(0..7).collect do |reg|
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value = @registers["r#{reg}".to_sym]
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str = "#{reg}-" +
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"#{reg}-" +
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case value
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when String
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value[0..10]
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@ -1,4 +1,5 @@
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require_relative "../helper"
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require "util/eventable"
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require "risc/interpreter"
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module Risc
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