little spring clean

This commit is contained in:
Torsten Ruger 2018-04-03 15:23:19 +03:00
parent 52d389cdbf
commit 4a2a1da3ff
2 changed files with 20 additions and 27 deletions

View File

@ -1,5 +1,3 @@
require "util/eventable"
module Risc module Risc
# An interpreter for the register level. As the register machine is a simple model, # An interpreter for the register level. As the register machine is a simple model,
@ -18,24 +16,18 @@ module Risc
include Logging include Logging
log_level :info log_level :info
attr_reader :instruction # current instruction or pc attr_reader :instruction , :clock # current instruction or pc
attr_reader :clock # current instruction or pc
attr_reader :registers # the registers, 16 (a hash, sym -> contents) attr_reader :registers # the registers, 16 (a hash, sym -> contents)
attr_reader :stdout # collect the output attr_reader :stdout, :state , :flags # somewhat like the lags on a cpu, hash sym => bool (zero .. . )
attr_reader :state # running etc
attr_reader :flags # somewhat like the lags on a cpu, hash sym => bool (zero .. . )
#start in state :stopped and set registers to unknown #start in state :stopped and set registers to unknown
def initialize() def initialize()
@state = :stopped @stdout , @clock , @state = "", 0 , :stopped
@stdout = ""
@registers = {} @registers = {}
@flags = { :zero => false , :plus => false , @flags = { :zero => false , :plus => false ,
:minus => false , :overflow => false } :minus => false , :overflow => false }
@clock = 0 (0...12).each do |reg|
(0...12).each do |r| set_register "r#{reg}".to_sym , "r#{reg}:unknown"
set_register "r#{r}".to_sym , "r#{r}:unknown"
end end
end end
@ -52,12 +44,12 @@ module Risc
trigger(:state_changed , old , state ) trigger(:state_changed , old , state )
end end
def set_instruction( i ) def set_instruction( instruction )
raise "set to same instruction #{i}:#{i.class}" if @instruction == i raise "set to same instruction #{instruction}:#{instruction.class}" if @instruction == instruction
old = @instruction old = @instruction
@instruction = i @instruction = instruction
trigger(:instruction_changed, old , i) trigger(:instruction_changed, old , instruction)
set_state( :exited) unless i set_state( :exited) unless instruction
end end
def get_register( reg ) def get_register( reg )
@ -79,7 +71,7 @@ module Risc
end end
return if old === val return if old === val
reg = reg.symbol if reg.is_a? Risc::RiscValue reg = reg.symbol if reg.is_a? Risc::RiscValue
val = Parfait.object_space.nil_object if( val == nil) #because that's what real code has val = Parfait.object_space.nil_object if val.nil? #because that's what real code has
@registers[reg] = val @registers[reg] = val
trigger(:register_changed, reg , old , val) trigger(:register_changed, reg , old , val)
end end
@ -264,19 +256,19 @@ module Risc
right = right.object_id unless right.is_a?(Integer) right = right.object_id unless right.is_a?(Integer)
case @instruction.operator case @instruction.operator
when :+ when :+
return left + right left + right
when :- when :-
return left - right left - right
when :>> when :>>
return left / (2**right) left / (2**right)
when :<< when :<<
return left * (2**right) left * (2**right)
when :* when :*
return left * right left * right
when :& when :&
return left & right left & right
when :| when :|
return left | right left | right
else else
raise "unimplemented '#{@instruction.operator}' #{@instruction}" raise "unimplemented '#{@instruction.operator}' #{@instruction}"
end end
@ -285,7 +277,7 @@ module Risc
def register_dump def register_dump
(0..7).collect do |reg| (0..7).collect do |reg|
value = @registers["r#{reg}".to_sym] value = @registers["r#{reg}".to_sym]
str = "#{reg}-" + "#{reg}-" +
case value case value
when String when String
value[0..10] value[0..10]

View File

@ -1,4 +1,5 @@
require_relative "../helper" require_relative "../helper"
require "util/eventable"
require "risc/interpreter" require "risc/interpreter"
module Risc module Risc