allow for registers in get slot

This commit is contained in:
Torsten Ruger
2015-11-07 19:38:03 +02:00
parent 1d07c1fb95
commit 484e2d19d4
2 changed files with 11 additions and 10 deletions

View File

@ -25,7 +25,11 @@ module Arm
def translate_GetSlot code
# times 4 because arm works in bytes, but vm in words
ArmMachine.ldr( code.register , code.array , 4 * code.index )
if(code.index.is_a? Numeric)
ArmMachine.ldr( code.register , code.array , 4 * code.index )
else
ArmMachine.ldr( code.register , code.array , code.index )
end
end
def translate_RegisterTransfer code