more renaming ripples

This commit is contained in:
Torsten Ruger
2014-08-22 18:00:23 +03:00
parent e398a6b053
commit 4783e6c326
10 changed files with 37 additions and 65 deletions

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@ -2,7 +2,7 @@
As of writing Kernel is an "old style" module, aka a bunch of functions.
These functions return their code, ie a Vm::Function object, which can then be called by ruby code as if it were a "normal"
These functions return their code, ie a Register::Function object, which can then be called by ruby code as if it were a "normal"
function.
A normal ruby function is one that is parsed and transformed to code. But not all functionality can be written in ruby,

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@ -1,15 +1,7 @@
require_relative "code"
module Register
# Because the idea of what one instruction does, does not always map one to one to real machine
# instructions, and instruction may link to another instruction thus creating an arbitrary list
# to get the job (the original instruciton) done
# Admittately it would be simpler just to create the (abstract) instructions and let the machine
# encode them into what-ever is neccessary, but this approach leaves more possibility to
# optimize the actual instruction stream (not just the salama instruction stream). Makes sense?
# We have basic classes (literally) of instructions
# The register machine model is close to current hardware and has following instruction classes
# - Memory
# - Stack
# - Logic

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@ -7,19 +7,19 @@ module Register
def less_or_equal block , right
block.cmp( self , right )
Vm::BranchCondition.new :le
Register::BranchCondition.new :le
end
def greater_or_equal block , right
block.cmp( self , right )
Vm::BranchCondition.new :ge
Register::BranchCondition.new :ge
end
def greater_than block , right
block.cmp( self , right )
Vm::BranchCondition.new :gt
Register::BranchCondition.new :gt
end
def less_than block , right
block.cmp( self , right )
Vm::BranchCondition.new :lt
Register::BranchCondition.new :lt
end
def plus block , first , right
block.add( self , left , right )
@ -35,12 +35,12 @@ module Register
end
def equals block , right
block.cmp( self , right )
Vm::BranchCondition.new :eq
Register::BranchCondition.new :eq
end
def is_true? function
function.cmp( self , 0 )
Vm::BranchCondition.new :ne
Register::BranchCondition.new :ne
end
def move block , right

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@ -85,7 +85,7 @@ module Register
c_name = clazz.name
my_module = self.class.name.split("::").first
clazz_name = clazz.name.split("::").last
if(my_module != Vm )
if(my_module != Register )
module_class = eval("#{my_module}::#{clazz_name}") rescue nil
clazz = module_class if module_class
end
@ -94,11 +94,11 @@ module Register
private
#defining the instruction (opcode, symbol) as an given class.
# the class is a Vm::Instruction derived base class and to create machine specific function
# the class is a Register::Instruction derived base class and to create machine specific function
# an actual machine must create derived classes (from this base class)
# These instruction classes must follow a naming pattern and take a hash in the contructor
# Example, a mov() opcode instantiates a Vm::MoveInstruction
# for an Arm machine, a class Arm::MoveInstruction < Vm::MoveInstruction exists, and it will
# Example, a mov() opcode instantiates a Register::MoveInstruction
# for an Arm machine, a class Arm::MoveInstruction < Register::MoveInstruction exists, and it will
# be used to define the mov on an arm machine.
# This methods picks up that derived class and calls a define_instruction methods that can
# be overriden in subclasses
@ -108,7 +108,7 @@ module Register
options = {} if options == nil
options.merge defaults
options[:opcode] = inst
first = Vm::Integer.new(first) if first.is_a? Symbol
first = Register::Integer.new(first) if first.is_a? Symbol
clazz.new(first , options)
end
end
@ -119,8 +119,8 @@ module Register
create_method(inst) do |left ,right , options = nil|
options = {} if options == nil
options.merge defaults
left = Vm::Integer.new(left) if left.is_a? Symbol
right = Vm::Integer.new(right) if right.is_a? Symbol
left = Register::Integer.new(left) if left.is_a? Symbol
right = Register::Integer.new(right) if right.is_a? Symbol
options[:opcode] = inst
clazz.new(left , right ,options)
end
@ -133,9 +133,9 @@ module Register
options = {} if options == nil
options.merge defaults
options[:opcode] = inst
result = Vm::Integer.new(result) if result.is_a? Symbol
left = Vm::Integer.new(left) if left.is_a? Symbol
right = Vm::Integer.new(right) if right.is_a? Symbol
result = Register::Integer.new(result) if result.is_a? Symbol
left = Register::Integer.new(left) if left.is_a? Symbol
right = Register::Integer.new(right) if right.is_a? Symbol
clazz.new(result, left , right ,options)
end
end

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@ -0,0 +1,3 @@
module Register
end

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@ -65,7 +65,7 @@ module Virtual
def locals_at l_block
used =[]
# call assigns the return register, but as it is in l_block, it is not asked.
assigned = [ RegisterReference.new(Vm::RegisterMachine.instance.return_register) ]
assigned = [ RegisterReference.new(Register::RegisterMachine.instance.return_register) ]
l_block.reachable.each do |b|
b.uses.each {|u|
(used << u) unless assigned.include?(u)

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@ -30,7 +30,7 @@ module Virtual
# Data gets assembled after methods
def add_data o
return if @objects.include? o
raise "must be derived from Code #{o.inspect}" unless o.is_a? Vm::Code
raise "must be derived from Code #{o.inspect}" unless o.is_a? Register::Code
@data << o # TODO check type , no basic values allowed (must be wrapped)
end