codong RegisterSlot with reg and slot

This commit is contained in:
Torsten 2020-03-01 12:42:28 +02:00
parent 64d860b2bf
commit 4643be0ae6
6 changed files with 74 additions and 69 deletions

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@ -5,7 +5,7 @@ module Risc
# Both use a base memory (a register)
# This is because that is what cpu's can do. In programming terms this would be accessing
# an element in an array, in the case of RegToSlot setting the register in the array.
# an element in an array, in the case of RegToSlot setting the register in the array.
# btw: to move data between registers, use Transfer
@ -16,6 +16,8 @@ module Risc
# Produce a RegToSlot instruction.
# From and to are registers
# index may be a Symbol in which case is resolves with resolve_index.
#
# The slot is ultimately a memory location, so no new register is created
def self.reg_to_slot( source , from , to , index )
raise "Not register #{to}" unless RegisterValue.look_like_reg(to)
index = to.resolve_index(index) if index.is_a?(Symbol)

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@ -14,8 +14,9 @@ module Risc
end
# Produce a SlotToReg instruction.
# Array and to are registers
# Array is a register
# index may be a Symbol in which case is resolves with resolve_index.
# a new regsister will be created as the result, ie the reg part for slot_to_reg
def self.slot_to_reg( source , array , index )
raise "Register #{array}" if RegisterValue.look_like_reg(array.symbol)
index = array.resolve_index(index) if index.is_a?(Symbol)

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@ -23,10 +23,36 @@ module Risc
# fullfil the objects purpose by creating a RegToSlot instruction from
# itself (the slot) and the register given
def <<( reg )
raise "not reg #{reg}" unless reg.is_a?(RegisterValue)
reg_to_slot = Risc.reg_to_slot("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg , register, index)
case reg
when RegisterValue
puts reg.symbol
to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg)
when RegisterSlot
puts reg.register.symbol
reg = to_reg("reduce #{@register.symbol}[@index]")
to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg)
else
raise "not reg value or slot #{reg}"
end
end
# push the given register into the slot that self represents
# ie create a slot_to_reg instruction and add to the compiler
# the register represents and "array", and the content of the
# given register from, is pushed to the memory at register[index]
def to_mem(source , from )
reg_to_slot = Risc.reg_to_slot(source , from , register, index)
compiler.add_code(reg_to_slot) if compiler
reg_to_slot
reg_to_slot.register
end
# load the conntent of the slot that self descibes into a a new register.
# the regsiter is created, and the slot_to_reg instruction added to the
# compiler. the return is a bit like @register[@index]
def to_reg(source )
slot_to_reg = Risc.slot_to_reg(source , register, index)
compiler.add_code(slot_to_reg) if compiler
slot_to_reg.register
end
# similar to above (<< which produces reg_to_slot), this produces reg_to_byte

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@ -144,6 +144,7 @@ module Risc
when RegisterValue
ins = Risc.transfer("#{right.type} to #{self.type}" , right , self)
when RegisterSlot
raise "logic error, after creating the reg, need to transfer"
ins = Risc::SlotToReg.new("#{right.register.type}[#{right.index}] -> #{self.type}" , right.register , right.index , self)
else
raise "not implemented for #{right.class}:#{right}"

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@ -1,71 +1,53 @@
require_relative "../helper"
module Risc
class TestRegisterSlot < MiniTest::Test
class TestRegisterSlot1 < MiniTest::Test
def setup
Parfait.boot!(Parfait.default_test_options)
@r0 = RegisterValue.new(:message , :Message)
@r1 = RegisterValue.new(:id_1234 , :Space)
@r2 = RegisterValue.new(:id_1256 , :Factory)
@compiler = Risc.test_compiler
@r0 = RegisterValue.new(:message , :Message).set_compiler(@compiler)
end
def test_class_name_type
assert_equal :Message , @r0.class_name
def test_reg_to_slot_reg
reg = @r0[:next_message] << @r0
assert_equal RegisterValue , reg.class
assert_equal :message , reg.symbol
assert_equal "Message_Type" , reg.type.name
end
def test_class_name_fix
assert_equal :Integer , RegisterValue.new(:id_234 , :Integer).class_name
def test_reg_to_slot_inst
@r0[:next_message] << @r0
assert_equal RegToSlot , @compiler.current.class
assert_equal @r0 , @compiler.current.register
assert_equal 1 , @compiler.current.index
assert_equal :message , @compiler.current.array.symbol
end
def test_r0
assert_equal :message , @r0.symbol
end
class TestRegisterSlot2 < MiniTest::Test
def setup
Parfait.boot!(Parfait.default_test_options)
@compiler = Risc.test_compiler
@r0 = RegisterValue.new(:message , :Message).set_compiler(@compiler)
end
def test_load_label
label = Risc::Label.new("HI","ho" , FakeAddress.new(0))
move = @r1 << label
assert_equal LoadConstant , move.class
def test_reg_to_slot_reg
reg = @r0[:next_message] << @r0[:next_message]
assert_equal RegisterValue , reg.class
assert_equal :"message.message" , reg.symbol
assert_equal "Message_Type" , reg.type.name
end
def test_transfer
transfer = @r0 << @r1
assert_equal Transfer , transfer.class
def test_reg_to_slot_inst1
@r0[:next_message] << @r0[:next_message]
inst = @compiler.risc_instructions.next
assert_equal SlotToReg , inst.class
assert_equal :"message.message" , inst.register.symbol
assert_equal 1 , inst.index
assert_equal :message , inst.array.symbol
end
def test_index_op
message = @r0[:next_message]
assert_equal RegisterSlot , message.class
assert_equal :next_message , message.index
assert_equal @r0 , message.register
end
def test_operator
ret = @r0.op :<< , @r1
assert_equal OperatorInstruction , ret.class
assert_equal @r0 , ret.left
assert_equal @r1 , ret.right
assert_equal :<< , ret.operator
end
def test_byte_to_reg
instr = @r0 <= @r1[1]
assert_equal ByteToReg , instr.class
assert_equal @r1 , instr.array
assert_equal @r0 , instr.register
assert_equal 1 , instr.index
end
def est_slot_to_reg
instr = @r0 << @r2[:next_object]
assert_equal SlotToReg , instr.class
assert_equal @r0 , instr.register
assert_equal 2 , instr.index
assert_equal @r1 , instr.array
end
def test_reg_to_byte
instr = @r1[1] <= @r0
assert_equal RegToByte , instr.class
assert_equal @r1 , instr.array
assert_equal @r0 , instr.register
assert_equal 1 , instr.index
end
def est_reg_to_slot
instr = @r2[:next_object] << @r0
assert_equal RegToSlot , instr.class
assert_equal @r0 , instr.register
assert_equal 2 , instr.index
assert_equal @r1 , instr.array
def test_reg_to_slot_inst2
@r0[:next_message] << @r0[:next_message]
inst = @compiler.current
assert_equal RegToSlot , inst.class
assert_equal :"message.message" , inst.register.symbol
assert_equal 1 , inst.index
assert_equal :message , inst.array.symbol
end
end
end

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@ -78,12 +78,5 @@ module Risc
assert_equal @r0 , instr.register
assert_equal 1 , instr.index
end
def est_reg_to_slot
instr = @r2[:next_object] << @r0
assert_equal RegToSlot , instr.class
assert_equal @r0 , instr.register
assert_equal 2 , instr.index
assert_equal @r1 , instr.array
end
end
end