codong RegisterSlot with reg and slot
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@ -23,10 +23,36 @@ module Risc
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# fullfil the objects purpose by creating a RegToSlot instruction from
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# itself (the slot) and the register given
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def <<( reg )
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raise "not reg #{reg}" unless reg.is_a?(RegisterValue)
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reg_to_slot = Risc.reg_to_slot("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg , register, index)
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case reg
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when RegisterValue
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puts reg.symbol
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to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg)
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when RegisterSlot
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puts reg.register.symbol
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reg = to_reg("reduce #{@register.symbol}[@index]")
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to_mem("#{reg.class_name} -> #{register.class_name}[#{index}]" , reg)
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else
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raise "not reg value or slot #{reg}"
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end
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end
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# push the given register into the slot that self represents
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# ie create a slot_to_reg instruction and add to the compiler
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# the register represents and "array", and the content of the
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# given register from, is pushed to the memory at register[index]
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def to_mem(source , from )
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reg_to_slot = Risc.reg_to_slot(source , from , register, index)
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compiler.add_code(reg_to_slot) if compiler
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reg_to_slot
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reg_to_slot.register
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end
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# load the conntent of the slot that self descibes into a a new register.
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# the regsiter is created, and the slot_to_reg instruction added to the
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# compiler. the return is a bit like @register[@index]
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def to_reg(source )
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slot_to_reg = Risc.slot_to_reg(source , register, index)
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compiler.add_code(slot_to_reg) if compiler
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slot_to_reg.register
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end
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# similar to above (<< which produces reg_to_slot), this produces reg_to_byte
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