codong RegisterSlot with reg and slot

This commit is contained in:
2020-03-01 12:42:28 +02:00
parent 64d860b2bf
commit 4643be0ae6
6 changed files with 74 additions and 69 deletions

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@ -5,7 +5,7 @@ module Risc
# Both use a base memory (a register)
# This is because that is what cpu's can do. In programming terms this would be accessing
# an element in an array, in the case of RegToSlot setting the register in the array.
# an element in an array, in the case of RegToSlot setting the register in the array.
# btw: to move data between registers, use Transfer
@ -16,6 +16,8 @@ module Risc
# Produce a RegToSlot instruction.
# From and to are registers
# index may be a Symbol in which case is resolves with resolve_index.
#
# The slot is ultimately a memory location, so no new register is created
def self.reg_to_slot( source , from , to , index )
raise "Not register #{to}" unless RegisterValue.look_like_reg(to)
index = to.resolve_index(index) if index.is_a?(Symbol)

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@ -14,8 +14,9 @@ module Risc
end
# Produce a SlotToReg instruction.
# Array and to are registers
# Array is a register
# index may be a Symbol in which case is resolves with resolve_index.
# a new regsister will be created as the result, ie the reg part for slot_to_reg
def self.slot_to_reg( source , array , index )
raise "Register #{array}" if RegisterValue.look_like_reg(array.symbol)
index = array.resolve_index(index) if index.is_a?(Symbol)