adds first version of the expanded as assembler from mikko
This commit is contained in:
Torsten Ruger
34
lib/asm/arm/addr_table_object.rb
Normal file
34
lib/asm/arm/addr_table_object.rb
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@ -0,0 +1,34 @@
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class Asm::ARM::AddrTableObject
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def initialize
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@table = []
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@const = []
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end
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# TODO don't create new entry if there's already an entry for the same label/const
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def add_label(label)
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d = [label, Asm::LabelObject.new]
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@table << d
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d[1]
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end
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def add_const(const)
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d = [const, Asm::LabelObject.new]
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@const << d
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d[1]
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end
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def assemble(io, as)
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@table.each do |pair|
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target_label, here_label = *pair
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here_label.assemble io, as
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as.add_relocation io.tell, target_label, Asm::ARM::R_ARM_ABS32,
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Asm::ARM::Instruction::RelocHandler
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io.write_uint32 0
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end
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@const.each do |pair|
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const, here_label = *pair
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here_label.assemble io, as
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io.write_uint32 const
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end
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end
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end
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54
lib/asm/arm/arm_assembler.rb
Normal file
54
lib/asm/arm/arm_assembler.rb
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@ -0,0 +1,54 @@
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require_relative 'assembler'
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module Asm
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module Arm
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# Relocation constants
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# Note that in this assembler, a relocation simply means any
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# reference to a label that can only be determined at assembly time
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# or later (as in the normal meaning)
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R_ARM_PC24 = 0x01
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R_ARM_ABS32 = 0x02
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# Unofficial (cant be used for extern relocations)
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R_ARM_PC12 = 0xF0
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# TODO actually find the closest somehow
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def self.closest_addrtable(as)
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as.objects.find do |obj|
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obj.is_a?(Asm::ARM::AddrTableObject)
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end || (raise Asm::AssemblyError.new('could not find addrtable to use', nil))
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end
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def self.write_resolved_relocation(io, addr, type)
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case type
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when R_ARM_PC24
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diff = addr - io.tell - 8
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packed = [diff >> 2].pack('l')
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io << packed[0,3]
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when R_ARM_ABS32
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packed = [addr].pack('l')
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io << packed
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when R_ARM_PC12
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diff = addr - io.tell - 8
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if (diff.abs > 2047)
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raise Asm::AssemblyError.new('offset too large for R_ARM_PC12 relocation',
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nil)
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end
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val = diff.abs
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sign = (diff>0)?1:0
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curr = io.read_uint32
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io.seek(-4, IO::SEEK_CUR)
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io.write_uint32 (curr & ~0b00000000100000000000111111111111) |
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val | (sign << 23)
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else
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raise 'unknown relocation type'
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end
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end
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end
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106
lib/asm/arm/builder_a.rb
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106
lib/asm/arm/builder_a.rb
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@ -0,0 +1,106 @@
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module Asm
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module Arm
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# ADDRESSING MODE 1
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# Complete!
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class BuilderA
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include Asm::ARM::InstructionTools
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def initialize
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@cond = 0b1110
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@inst_class = 0
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@i = 0
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@opcode = 0
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@s = 0
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@rn = 0
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@rd = 0
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@operand = 0
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end
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attr_accessor :cond, :inst_class, :i, :opcode, :s,
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:rn, :rd, :operand
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def self.make(inst_class, opcode, s)
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a = new
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a.inst_class = inst_class
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a.opcode = opcode
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a.s = s
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a
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end
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def calculate_u8_with_rr(arg)
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parts = arg.value.to_s(2).rjust(32,'0').scan(/^(0*)(.+?)0*$/).flatten
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pre_zeros = parts[0].length
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imm_len = parts[1].length
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if ((pre_zeros+imm_len) % 2 == 1)
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u8_imm = (parts[1]+'0').to_i(2)
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imm_len += 1
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else
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u8_imm = parts[1].to_i(2)
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end
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if (u8_imm.fits_u8?)
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# can do!
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rot_imm = (pre_zeros+imm_len) / 2
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if (rot_imm > 15)
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return nil
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end
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return u8_imm | (rot_imm << 8)
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else
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return nil
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end
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end
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# Build representation for source value
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def build_operand(arg)
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if (arg.is_a?(Asm::Parser::NumLiteralArgNode))
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if (arg.value.fits_u8?)
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# no shifting needed
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@operand = arg.value
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@i = 1
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elsif (op_with_rot = calculate_u8_with_rr(arg))
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@operand = op_with_rot
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@i = 1
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else
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raise Asm::AssemblyError.new(Asm::ERRSTR_NUMERIC_TOO_LARGE, arg)
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end
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elsif (arg.is_a?(Asm::Parser::RegisterArgNode))
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@operand = reg_ref(arg)
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@i = 0
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elsif (arg.is_a?(Asm::Parser::ShiftNode))
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rm_ref = reg_ref(arg.argument)
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@i = 0
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shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
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'ror' => 0b110, 'rrx' => 0b110}[arg.type]
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if (arg.type == 'ror' and arg.value.nil?)
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# ror #0 == rrx
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raise Asm::AssemblyError.new('cannot rotate by zero', arg)
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end
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arg1 = arg.value
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if (arg1.is_a?(Asm::Parser::NumLiteralArgNode))
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if (arg1.value >= 32)
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raise Asm::AssemblyError.new('cannot shift by more than 31', arg1)
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end
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shift_imm = arg1.value
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elsif (arg1.is_a?(Asm::Parser::RegisterArgNode))
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shift_op |= 0x1;
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shift_imm = reg_ref(arg1) << 1
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elsif (arg.type == 'rrx')
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shift_imm = 0
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end
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@operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
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else
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raise Asm::AssemblyError.new(Asm::ERRSTR_INVALID_ARG, arg)
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end
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end
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def write(io, as)
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val = operand | (rd << 12) | (rn << 12+4) |
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(s << 12+4+4) | (opcode << 12+4+4+1) |
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(i << 12+4+4+1+4) | (inst_class << 12+4+4+1+4+1) |
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(cond << 12+4+4+1+4+1+2)
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io.write_uint32 val
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end
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end
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end
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end
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113
lib/asm/arm/builder_b.rb
Normal file
113
lib/asm/arm/builder_b.rb
Normal file
@ -0,0 +1,113 @@
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module Asm
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module Arm
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# ADDRESSING MODE 2
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# Implemented: immediate offset with offset=0
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class BuilderB
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include Asm::ARM::InstructionTools
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def initialize
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@cond = 0b1110
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@inst_class = 0
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@i = 0 #I flag (third bit)
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@pre_post_index = 0 #P flag
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@add_offset = 0 #U flag
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@byte_access = 0 #B flag
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@w = 0 #W flag
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@load_store = 0 #L flag
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@rn = 0
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@rd = 0
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@operand = 0
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end
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attr_accessor :cond, :inst_class, :i, :pre_post_index, :add_offset,
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:byte_access, :w, :load_store, :rn, :rd, :operand
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def self.make(inst_class, byte_access, load_store)
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a = new
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a.inst_class = inst_class
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a.byte_access = byte_access
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a.load_store = load_store
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a
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end
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class MathReferenceArgNode < Asm::Parser::ReferenceArgNode
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attr_accessor :op, :right
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end
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def simplify_reference(arg)
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node = MathReferenceArgNode.new
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if (arg.is_a?(Asm::Parser::MathNode))
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node.argument = arg.left
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node.op = arg.op
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node.right = arg.right
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else
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node.argument = arg
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end
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node
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end
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# Build representation for target address
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def build_operand(arg1)
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if (arg1.is_a?(Asm::Parser::ReferenceArgNode))
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argr = simplify_reference(arg1.argument)
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arg = argr.argument
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if (arg.is_a?(Asm::Parser::RegisterArgNode))
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@i = 0
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@pre_post_index = 1
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@w = 0
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@rn = reg_ref(arg)
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@operand = 0
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if (argr.op and argr.right.is_a?(Asm::Parser::NumLiteralArgNode))
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val = argr.right.value
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if (val < 0)
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@add_offset = 0
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val *= -1
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else
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@add_offset = 1
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end
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if (val.abs > 4095)
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raise Asm::AssemblyError.new('reference offset too large/small (max 4095)', argr.right)
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end
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@operand = val
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elsif (argr.op)
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raise Asm::AssemblyError.new('reference offset must be an integer literal', argr.right)
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end
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else
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raise Asm::AssemblyError.new(Asm::ERRSTR_INVALID_ARG, arg)
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end
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elsif (arg1.is_a?(Asm::Parser::LabelEquivAddrArgNode) or arg1.is_a?(Asm::Parser::NumEquivAddrArgNode))
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@i = 0
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@pre_post_index = 1
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@w = 0
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@rn = 15 # pc
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@operand = 0
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@use_addrtable_reloc = true
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@addrtable_reloc_target = arg1
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else
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raise Asm::AssemblyError.new(Asm::ERRSTR_INVALID_ARG, arg1)
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end
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end
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def write(io, as, ast_asm, inst)
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val = operand | (rd << 12) | (rn << 12+4) |
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(load_store << 12+4+4) | (w << 12+4+4+1) |
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(byte_access << 12+4+4+1+1) | (add_offset << 12+4+4+1+1+1) |
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(pre_post_index << 12+4+4+1+1+1+1) | (i << 12+4+4+1+1+1+1+1) |
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(inst_class << 12+4+4+1+1+1+1+1+1) | (cond << 12+4+4+1+1+1+1+1+1+2)
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if (@use_addrtable_reloc)
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closest_addrtable = Asm::ARM.closest_addrtable(as)
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if (@addrtable_reloc_target.is_a?(Asm::Parser::LabelEquivAddrArgNode))
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obj = ast_asm.object_for_label(@addrtable_reloc_target.label, inst)
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ref_label = closest_addrtable.add_label(obj)
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elsif (@addrtable_reloc_target.is_a?(Asm::Parser::NumEquivAddrArgNode))
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ref_label = closest_addrtable.add_const(@addrtable_reloc_target.value)
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end
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as.add_relocation io.tell, ref_label, Asm::ARM::R_ARM_PC12,
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Asm::ARM::Instruction::RelocHandler
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end
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io.write_uint32 val
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end
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end
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end
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end
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52
lib/asm/arm/builder_d.rb
Normal file
52
lib/asm/arm/builder_d.rb
Normal file
@ -0,0 +1,52 @@
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module Asm
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module Arm
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# ADDRESSING MODE 4
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class BuilderD
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include Asm::ARM::InstructionTools
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def initialize
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@cond = 0b1110
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@inst_class = Asm::ARM::Instruction::OPC_STACK
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@pre_post_index = 0
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@up_down = 0
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@s = 0
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@write_base = 0
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@store_load = 0
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@rn = 0
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@operand = 0
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end
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attr_accessor :cond, :inst_class, :pre_post_index, :up_down,
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:s, :write_base, :store_load, :rn, :operand
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def self.make(pre_post, up_down, write, store_load)
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a = new
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a.pre_post_index = pre_post
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a.up_down = up_down
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a.write_base = write
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a.store_load = store_load
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a
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end
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# Build representation for source value
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def build_operand(arg)
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if (arg.is_a?(Asm::Parser::RegisterListArgNode))
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@operand = 0
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arg.registers.each do |reg_node|
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reg = reg_ref(reg_node)
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@operand |= (1 << reg)
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end
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else
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raise Asm::AssemblyError.new(Asm::ERRSTR_INVALID_ARG, arg)
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end
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end
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def write(io, as)
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val = operand | (rn << 16) | (store_load << 16+4) |
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(write_base << 16+4+1) | (s << 16+4+1+1) | (up_down << 16+4+1+1+1) |
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(pre_post_index << 16+4+1+1+1+1) | (inst_class << 16+4+1+1+1+1+2) |
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(cond << 16+4+1+1+1+1+2+2)
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io.write_uint32 val
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end
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end
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end
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end
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126
lib/asm/arm/code_generator.rb
Normal file
126
lib/asm/arm/code_generator.rb
Normal file
@ -0,0 +1,126 @@
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require_relative 'arm_assembler'
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require_relative 'parser'
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require 'stringio'
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module Asm
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module Arm
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class CodeGenerator
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def initialize
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@asm = Asm::Assembler.new
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@externs = []
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end
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def data(str)
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@asm.add_object Asm::DataObject.new(str)
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end
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%w(r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12
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r13 r14 r15 a1 a2 a3 a4 v1 v2 v3 v4 v5 v6
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rfp sl fp ip sp lr pc
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).each { |reg|
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define_method(reg) {
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[:reg, reg]
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}
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}
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def instruction(name, *args)
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node = Asm::Parser::InstructionNode.new
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node.opcode = name.to_s
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node.args = []
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args.each { |arg|
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if (arg.is_a?(Array))
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if (arg[0] == :reg)
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node.args << Asm::Parser::RegisterArgNode.new { |n|
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n.name = arg[1]
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}
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end
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elsif (arg.is_a?(Integer))
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node.args << Asm::Parser::NumLiteralArgNode.new { |n|
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n.value = arg
|
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}
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elsif (arg.is_a?(Symbol))
|
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node.args << Asm::Parser::LabelRefArgNode.new { |n|
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n.label = arg.to_s
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}
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elsif (arg.is_a?(GeneratorLabel) or arg.is_a?(GeneratorExternLabel))
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node.args << arg
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||||
else
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raise 'Invalid argument `%s\' for instruction' % arg.inspect
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end
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}
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||||
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@asm.add_object Asm::ARM::Instruction.new(node)
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||||
end
|
||||
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||||
%w(adc add and bic eor orr rsb rsc sbc sub
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mov mvn cmn cmp teq tst b bl bx swi strb
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||||
).each { |inst|
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||||
define_method(inst) { |*args|
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instruction inst.to_sym, *args
|
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}
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||||
define_method(inst+'s') { |*args|
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instruction (inst+'s').to_sym, *args
|
||||
}
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%w(al eq ne cs mi hi cc pl ls vc
|
||||
lt le ge gt vs
|
||||
).each { |cond_suffix|
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define_method(inst+cond_suffix) { |*args|
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instruction (inst+cond_suffix).to_sym, *args
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||||
}
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define_method(inst+'s'+cond_suffix) { |*args|
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instruction (inst+'s'+cond_suffix).to_sym, *args
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||||
}
|
||||
}
|
||||
}
|
||||
|
||||
class GeneratorLabel < Asm::LabelObject
|
||||
def initialize(asm)
|
||||
@asm = asm
|
||||
end
|
||||
def set!
|
||||
@asm.add_object self
|
||||
end
|
||||
end
|
||||
|
||||
class GeneratorExternLabel < Asm::LabelObject
|
||||
def initialize(name)
|
||||
@name = name
|
||||
extern!
|
||||
end
|
||||
attr_reader :name
|
||||
end
|
||||
|
||||
def label
|
||||
GeneratorLabel.new(@asm)
|
||||
end
|
||||
|
||||
def label!
|
||||
lbl = GeneratorLabel.new(@asm)
|
||||
lbl.set!
|
||||
lbl
|
||||
end
|
||||
|
||||
def extern(sym)
|
||||
if (lbl = @externs.find { |extern| extern.name == sym })
|
||||
lbl
|
||||
else
|
||||
@externs << lbl = GeneratorExternLabel.new(sym)
|
||||
@asm.add_object lbl
|
||||
lbl
|
||||
end
|
||||
end
|
||||
|
||||
def assemble
|
||||
io = StringIO.new
|
||||
@asm.assemble(io)
|
||||
io.string
|
||||
end
|
||||
|
||||
def relocations
|
||||
@asm.relocations
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
149
lib/asm/arm/instruction.rb
Normal file
149
lib/asm/arm/instruction.rb
Normal file
@ -0,0 +1,149 @@
|
||||
module Asm
|
||||
module Arm
|
||||
class Asm::ARM::Instruction
|
||||
include Asm::ARM::InstructionTools
|
||||
|
||||
COND_POSTFIXES = Regexp.union(%w(eq ne cs cc mi pl vs vc hi ls ge lt gt le al)).source
|
||||
def initialize(node, ast_asm = nil)
|
||||
@node = node
|
||||
@ast_asm = ast_asm
|
||||
opcode = node.opcode
|
||||
args = node.args
|
||||
|
||||
opcode = opcode.downcase
|
||||
@cond = :al
|
||||
if (opcode =~ /(#{COND_POSTFIXES})$/)
|
||||
@cond = $1.to_sym
|
||||
opcode = opcode[0..-3]
|
||||
end
|
||||
if (opcode =~ /s$/)
|
||||
@s = true
|
||||
opcode = opcode[0..-2]
|
||||
else
|
||||
@s = false
|
||||
end
|
||||
@opcode = opcode.downcase.to_sym
|
||||
@args = args
|
||||
end
|
||||
attr_reader :opcode, :args
|
||||
|
||||
OPC_DATA_PROCESSING = 0b00
|
||||
OPC_MEMORY_ACCESS = 0b01
|
||||
OPC_STACK = 0b10
|
||||
# These are used differently in the
|
||||
# instruction encoders
|
||||
OPCODES = {
|
||||
:adc => 0b0101, :add => 0b0100,
|
||||
:and => 0b0000, :bic => 0b1110,
|
||||
:eor => 0b0001, :orr => 0b1100,
|
||||
:rsb => 0b0011, :rsc => 0b0111,
|
||||
:sbc => 0b0110, :sub => 0b0010,
|
||||
|
||||
# for these Rn is sbz (should be zero)
|
||||
:mov => 0b1101,
|
||||
:mvn => 0b1111,
|
||||
# for these Rd is sbz and S=1
|
||||
:cmn => 0b1011,
|
||||
:cmp => 0b1010,
|
||||
:teq => 0b1001,
|
||||
:tst => 0b1000,
|
||||
|
||||
:b => 0b1010,
|
||||
:bl => 0b1011,
|
||||
:bx => 0b00010010
|
||||
}
|
||||
COND_BITS = {
|
||||
:al => 0b1110, :eq => 0b0000,
|
||||
:ne => 0b0001, :cs => 0b0010,
|
||||
:mi => 0b0100, :hi => 0b1000,
|
||||
:cc => 0b0011, :pl => 0b0101,
|
||||
:ls => 0b1001, :vc => 0b0111,
|
||||
:lt => 0b1011, :le => 0b1101,
|
||||
:ge => 0b1010, :gt => 0b1100,
|
||||
:vs => 0b0110
|
||||
}
|
||||
|
||||
RelocHandler = Asm::ARM.method(:write_resolved_relocation)
|
||||
|
||||
def assemble(io, as)
|
||||
s = @s ? 1 : 0
|
||||
case opcode
|
||||
when :adc, :add, :and, :bic, :eor, :orr, :rsb, :rsc, :sbc, :sub
|
||||
a = BuilderA.make(OPC_DATA_PROCESSING, OPCODES[opcode], s)
|
||||
a.cond = COND_BITS[@cond]
|
||||
a.rd = reg_ref(args[0])
|
||||
a.rn = reg_ref(args[1])
|
||||
a.build_operand args[2]
|
||||
a.write io, as
|
||||
when :cmn, :cmp, :teq, :tst
|
||||
a = BuilderA.make(OPC_DATA_PROCESSING, OPCODES[opcode], 1)
|
||||
a.cond = COND_BITS[@cond]
|
||||
a.rn = reg_ref(args[0])
|
||||
a.rd = 0
|
||||
a.build_operand args[1]
|
||||
a.write io, as
|
||||
when :mov, :mvn
|
||||
a = BuilderA.make(OPC_DATA_PROCESSING, OPCODES[opcode], s)
|
||||
a.cond = COND_BITS[@cond]
|
||||
a.rn = 0
|
||||
a.rd = reg_ref(args[0])
|
||||
a.build_operand args[1]
|
||||
a.write io, as
|
||||
when :strb, :str
|
||||
a = BuilderB.make(OPC_MEMORY_ACCESS, (opcode == :strb ? 1 : 0), 0)
|
||||
a.cond = COND_BITS[@cond]
|
||||
a.rd = reg_ref(args[1])
|
||||
a.build_operand args[0]
|
||||
a.write io, as, @ast_asm, self
|
||||
when :ldrb, :ldr
|
||||
a = BuilderB.make(OPC_MEMORY_ACCESS, (opcode == :ldrb ? 1 : 0), 1)
|
||||
a.cond = COND_BITS[@cond]
|
||||
a.rd = reg_ref(args[0])
|
||||
a.build_operand args[1]
|
||||
a.write io, as, @ast_asm, self
|
||||
when :push, :pop
|
||||
# downward growing, decrement before memory access
|
||||
# official ARM style stack as used by gas
|
||||
if (opcode == :push)
|
||||
a = BuilderD.make(1,0,1,0)
|
||||
else
|
||||
a = BuilderD.make(0,1,1,1)
|
||||
end
|
||||
a.cond = COND_BITS[@cond]
|
||||
a.rn = 13 # sp
|
||||
a.build_operand args[0]
|
||||
a.write io, as
|
||||
when :b, :bl
|
||||
arg = args[0]
|
||||
if (arg.is_a?(Asm::Parser::NumLiteralArgNode))
|
||||
jmp_val = arg.value >> 2
|
||||
packed = [jmp_val].pack('l')
|
||||
# signed 32-bit, condense to 24-bit
|
||||
# TODO add check that the value fits into 24 bits
|
||||
io << packed[0,3]
|
||||
elsif (arg.is_a?(Asm::LabelObject) or arg.is_a?(Asm::Parser::LabelRefArgNode))
|
||||
arg = @ast_asm.object_for_label(arg.label, self) if arg.is_a?(Asm::Parser::LabelRefArgNode)
|
||||
as.add_relocation(io.tell, arg, Asm::ARM::R_ARM_PC24, RelocHandler)
|
||||
io << "\x00\x00\x00"
|
||||
end
|
||||
io.write_uint8 OPCODES[opcode] | (COND_BITS[@cond] << 4)
|
||||
when :bx
|
||||
rm = reg_ref(args[0])
|
||||
io.write_uint32 rm | (0b1111111111110001 << 4) | (OPCODES[:bx] << 16+4) |
|
||||
(COND_BITS[@cond] << 16+4+8)
|
||||
when :swi
|
||||
arg = args[0]
|
||||
if (arg.is_a?(Asm::Parser::NumLiteralArgNode))
|
||||
packed = [arg.value].pack('L')[0,3]
|
||||
io << packed
|
||||
io.write_uint8 0b1111 | (COND_BITS[@cond] << 4)
|
||||
else
|
||||
raise Asm::AssemblyError.new(Asm::ERRSTR_INVALID_ARG, arg)
|
||||
end
|
||||
else
|
||||
raise Asm::AssemblyError.new("unknown instruction #{opcode}", @node)
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
25
lib/asm/arm/instruction_tools.rb
Normal file
25
lib/asm/arm/instruction_tools.rb
Normal file
@ -0,0 +1,25 @@
|
||||
module Asm
|
||||
module Arm
|
||||
module Asm::ARM::InstructionTools
|
||||
def reg_ref(arg)
|
||||
if (not arg.is_a?(Asm::Parser::RegisterArgNode))
|
||||
raise Asm::AssemblyError.new('argument must be a register', arg)
|
||||
end
|
||||
|
||||
ref =
|
||||
{'r0' => 0, 'r1' => 1, 'r2' => 2, 'r3' => 3, 'r4' => 4, 'r5' => 5,
|
||||
'r6' => 6, 'r7' => 7, 'r8' => 8, 'r9' => 9, 'r10' => 10, 'r11' => 11,
|
||||
'r12' => 12, 'r13' => 13, 'r14' => 14, 'r15' => 15, 'a1' => 0, 'a2' => 1,
|
||||
'a3' => 2, 'a4' => 3, 'v1' => 4, 'v2' => 5, 'v3' => 6, 'v4' => 7, 'v5' => 8,
|
||||
'v6' => 9, 'rfp' => 9, 'sl' => 10, 'fp' => 11, 'ip' => 12, 'sp' => 13,
|
||||
'lr' => 14, 'pc' => 15}[arg.name.downcase]
|
||||
|
||||
if (not ref)
|
||||
raise Asm::AssemblyError.new('unknown register %s' % arg.name.downcase, arg)
|
||||
end
|
||||
|
||||
ref
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
Reference in New Issue
Block a user