finally coded the logic Shifting (what a beast)
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@ -112,7 +112,7 @@ module Arm
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# SUB r2, r1, #10 # keep (x-10) for later
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block.add_code sub( remainder , left: number , right: 10 )
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# SUB r1, r1, r1, lsr #2
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block.add_code add( number , left: number , right: number , shift_right: 4)
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block.add_code add( number , left: number , right: number , shift_lsr: 4)
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# ADD r1, r1, r1, lsr #4
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# ADD r1, r1, r1, lsr #8
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# ADD r1, r1, r1, lsr #16
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@ -13,7 +13,7 @@ module Arm
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@left = @attributes[:left]
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raise "Left arg must be given #{inspect}" unless @left
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@i = 0
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@immediate = 0
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end
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# arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
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@ -23,71 +23,62 @@ module Arm
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# Build representation for source value
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def build
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arg = @attributes[:right]
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right = @attributes[:right]
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if @left.is_a?(Vm::StringConstant)
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# do pc relative addressing with the difference to the instuction
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# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute)
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arg = Vm::IntegerConstant.new( @left.position - self.position - 8 )
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# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
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right = @left.position - self.position - 8
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@left = :pc
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end
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if( arg.is_a? Fixnum ) #HACK to not have to change the code just now
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arg = Vm::IntegerConstant.new( arg )
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# automatic wrapping, for machine internal code and testing
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if( right.is_a? Fixnum )
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right = Vm::IntegerConstant.new( right )
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end
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if (arg.is_a?(Vm::IntegerConstant))
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if (arg.integer.fits_u8?)
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if (right.is_a?(Vm::IntegerConstant))
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if (right.integer.fits_u8?)
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# no shifting needed
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@operand = arg.integer
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@i = 1
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elsif (op_with_rot = calculate_u8_with_rr(arg))
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@operand = right.integer
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@immediate = 1
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elsif (op_with_rot = calculate_u8_with_rr(right))
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@operand = op_with_rot
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@i = 1
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@immediate = 1
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raise "hmm"
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else
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raise "cannot fit numeric literal argument in operand #{arg.inspect}"
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raise "cannot fit numeric literal argument in operand #{right.inspect}"
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end
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elsif (arg.is_a?(Symbol) or arg.is_a?(Vm::Integer))
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@operand = arg
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@i = 0
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elsif (arg.is_a?(Arm::Shift))
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rm_ref = arg.argument
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@i = 0
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shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
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'ror' => 0b110, 'rrx' => 0b110}[arg.type]
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if (arg.type == 'ror' and arg.value.nil?)
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# ror #0 == rrx
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raise "cannot rotate by zero #{arg} #{inspect}"
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end
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arg1 = arg.value
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if (arg1.is_a?(Vm::IntegerConstant))
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if (arg1.value >= 32)
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raise "cannot shift by more than 31 #{arg1} #{inspect}"
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end
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shift_imm = arg1.value
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elsif (arg1.is_a?(Arm::Register))
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shift_op val |= 0x1;
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shift_imm = arg1.number << 1
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elsif (arg.type == 'rrx')
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shift_imm = 0
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end
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@operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
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elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer))
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@operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
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@immediate = 0 # ie not immediate is register
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else
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raise "invalid operand argument #{arg.inspect} , #{inspect}"
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raise "invalid operand argument #{right.inspect} , #{inspect}"
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end
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#codes that one can shift, first two probably most common.
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# l (in lsr) means logical, ie unsigned, a (in asl) is arithmetic, ie signed
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{'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100, 'ror' => 0b110, 'rrx' => 0b110}.each do |short, bin|
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long = "shift_#{short}".to_sym
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if shif = @attributes[long]
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shif = shif.integer if (shif.is_a?(Vm::IntegerConstant))
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if (shif.is_a?(Vm::Integer))
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bin |= 0x1;
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shift = shif.register << 1
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end
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raise "0 < shift <= 32 #{shif} #{inspect}" if (shif >= 32) or( shif < 0)
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@operand |= shift(bin , 4 )
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@operand |= shift(shif , 4+3)
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break
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end
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end
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end
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def assemble(io)
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build
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instuction_class = 0b00 # OPC_DATA_PROCESSING
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val = (@operand.is_a?(Symbol) or @operand.is_a?(Vm::Integer)) ? reg_code(@operand) : @operand
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val = 0 if val == nil
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val = shift(val , 0)
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raise inspect unless reg_code(@first)
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val = shift(@operand , 0)
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val |= shift(reg_code(@first) , 12)
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val |= shift(reg_code(@left) , 12+4)
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val |= shift(@attributes[:update_status_flag] , 12+4+4)#20
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val |= shift(op_bit_code , 12+4+4 +1)
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val |= shift(@i , 12+4+4 +1+4)
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val |= shift(@immediate , 12+4+4 +1+4)
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val |= shift(instuction_class , 12+4+4 +1+4+1)
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val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
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io.write_uint32 val
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