finally coded the logic Shifting (what a beast)

This commit is contained in:
Torsten Ruger 2014-05-16 12:55:51 +03:00
parent 87e0f297e3
commit 4030f32ead
2 changed files with 37 additions and 46 deletions

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@ -112,7 +112,7 @@ module Arm
# SUB r2, r1, #10 # keep (x-10) for later # SUB r2, r1, #10 # keep (x-10) for later
block.add_code sub( remainder , left: number , right: 10 ) block.add_code sub( remainder , left: number , right: 10 )
# SUB r1, r1, r1, lsr #2 # SUB r1, r1, r1, lsr #2
block.add_code add( number , left: number , right: number , shift_right: 4) block.add_code add( number , left: number , right: number , shift_lsr: 4)
# ADD r1, r1, r1, lsr #4 # ADD r1, r1, r1, lsr #4
# ADD r1, r1, r1, lsr #8 # ADD r1, r1, r1, lsr #8
# ADD r1, r1, r1, lsr #16 # ADD r1, r1, r1, lsr #16

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@ -13,7 +13,7 @@ module Arm
@left = @attributes[:left] @left = @attributes[:left]
raise "Left arg must be given #{inspect}" unless @left raise "Left arg must be given #{inspect}" unless @left
@i = 0 @immediate = 0
end end
# arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported) # arm intrucioons are pretty sensible, and always 4 bytes (thumb not supported)
@ -23,71 +23,62 @@ module Arm
# Build representation for source value # Build representation for source value
def build def build
arg = @attributes[:right] right = @attributes[:right]
if @left.is_a?(Vm::StringConstant) if @left.is_a?(Vm::StringConstant)
# do pc relative addressing with the difference to the instuction # do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie oc pointing to fetch and not execute) # 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
arg = Vm::IntegerConstant.new( @left.position - self.position - 8 ) right = @left.position - self.position - 8
@left = :pc @left = :pc
end end
if( arg.is_a? Fixnum ) #HACK to not have to change the code just now # automatic wrapping, for machine internal code and testing
arg = Vm::IntegerConstant.new( arg ) if( right.is_a? Fixnum )
right = Vm::IntegerConstant.new( right )
end end
if (arg.is_a?(Vm::IntegerConstant)) if (right.is_a?(Vm::IntegerConstant))
if (arg.integer.fits_u8?) if (right.integer.fits_u8?)
# no shifting needed # no shifting needed
@operand = arg.integer @operand = right.integer
@i = 1 @immediate = 1
elsif (op_with_rot = calculate_u8_with_rr(arg)) elsif (op_with_rot = calculate_u8_with_rr(right))
@operand = op_with_rot @operand = op_with_rot
@i = 1 @immediate = 1
raise "hmm" raise "hmm"
else else
raise "cannot fit numeric literal argument in operand #{arg.inspect}" raise "cannot fit numeric literal argument in operand #{right.inspect}"
end end
elsif (arg.is_a?(Symbol) or arg.is_a?(Vm::Integer)) elsif (right.is_a?(Symbol) or right.is_a?(Vm::Integer))
@operand = arg @operand = reg_code(right) #integer means the register the integer is in (otherwise constant)
@i = 0 @immediate = 0 # ie not immediate is register
elsif (arg.is_a?(Arm::Shift))
rm_ref = arg.argument
@i = 0
shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
'ror' => 0b110, 'rrx' => 0b110}[arg.type]
if (arg.type == 'ror' and arg.value.nil?)
# ror #0 == rrx
raise "cannot rotate by zero #{arg} #{inspect}"
end
arg1 = arg.value
if (arg1.is_a?(Vm::IntegerConstant))
if (arg1.value >= 32)
raise "cannot shift by more than 31 #{arg1} #{inspect}"
end
shift_imm = arg1.value
elsif (arg1.is_a?(Arm::Register))
shift_op val |= 0x1;
shift_imm = arg1.number << 1
elsif (arg.type == 'rrx')
shift_imm = 0
end
@operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
else else
raise "invalid operand argument #{arg.inspect} , #{inspect}" raise "invalid operand argument #{right.inspect} , #{inspect}"
end
#codes that one can shift, first two probably most common.
# l (in lsr) means logical, ie unsigned, a (in asl) is arithmetic, ie signed
{'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100, 'ror' => 0b110, 'rrx' => 0b110}.each do |short, bin|
long = "shift_#{short}".to_sym
if shif = @attributes[long]
shif = shif.integer if (shif.is_a?(Vm::IntegerConstant))
if (shif.is_a?(Vm::Integer))
bin |= 0x1;
shift = shif.register << 1
end
raise "0 < shift <= 32 #{shif} #{inspect}" if (shif >= 32) or( shif < 0)
@operand |= shift(bin , 4 )
@operand |= shift(shif , 4+3)
break
end
end end
end end
def assemble(io) def assemble(io)
build build
instuction_class = 0b00 # OPC_DATA_PROCESSING instuction_class = 0b00 # OPC_DATA_PROCESSING
val = (@operand.is_a?(Symbol) or @operand.is_a?(Vm::Integer)) ? reg_code(@operand) : @operand val = shift(@operand , 0)
val = 0 if val == nil
val = shift(val , 0)
raise inspect unless reg_code(@first)
val |= shift(reg_code(@first) , 12) val |= shift(reg_code(@first) , 12)
val |= shift(reg_code(@left) , 12+4) val |= shift(reg_code(@left) , 12+4)
val |= shift(@attributes[:update_status_flag] , 12+4+4)#20 val |= shift(@attributes[:update_status_flag] , 12+4+4)#20
val |= shift(op_bit_code , 12+4+4 +1) val |= shift(op_bit_code , 12+4+4 +1)
val |= shift(@i , 12+4+4 +1+4) val |= shift(@immediate , 12+4+4 +1+4)
val |= shift(instuction_class , 12+4+4 +1+4+1) val |= shift(instuction_class , 12+4+4 +1+4+1)
val |= shift(cond_bit_code , 12+4+4 +1+4+1+2) val |= shift(cond_bit_code , 12+4+4 +1+4+1+2)
io.write_uint32 val io.write_uint32 val