fix div10 return sequence

did not return at all before
This commit is contained in:
Torsten Ruger 2018-03-24 16:51:26 +02:00
parent 267237b776
commit 3ceb2c2f69
2 changed files with 31 additions and 25 deletions

View File

@ -16,7 +16,7 @@ module Risc
end
def div10 context
def div10( context )
s = "div_10"
compiler = compiler_for(:Integer,:div10 ,{})
me = compiler.add_known( :receiver )
@ -68,6 +68,7 @@ module Risc
# return q + tmp
compiler.add_code Risc.op( s , "+" , q , tmp )
compiler.add_reg_to_slot( s , q , :message , :return_value)
compiler.add_mom( Mom::ReturnSequence.new)
return compiler.method
end
end

View File

@ -11,44 +11,49 @@ module Risc
def test_chain
#show_ticks # get output of what is
check_chain [Branch, Label, LoadConstant, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, RegToSlot, FunctionCall, Label,
LoadConstant, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
check_chain [Branch, Label, LoadConstant, SlotToReg, LoadConstant,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, SlotToReg, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, SlotToReg, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, RegToSlot, LoadConstant, RegToSlot, FunctionCall,
Label, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, LoadConstant, FunctionCall,
Label, SlotToReg, SlotToReg, SlotToReg, LoadConstant,
OperatorInstruction, LoadConstant, OperatorInstruction, OperatorInstruction, LoadConstant,
RegToSlot, LoadConstant, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, SlotToReg, LoadConstant,
FunctionCall, Label, SlotToReg, SlotToReg, SlotToReg,
LoadConstant, OperatorInstruction, LoadConstant, OperatorInstruction, OperatorInstruction,
LoadConstant, Transfer, OperatorInstruction, OperatorInstruction, LoadConstant,
Transfer, OperatorInstruction, OperatorInstruction, LoadConstant, Transfer,
OperatorInstruction, OperatorInstruction, LoadConstant, Transfer, OperatorInstruction,
OperatorInstruction, LoadConstant, OperatorInstruction, LoadConstant, Transfer,
OperatorInstruction, OperatorInstruction, Transfer, LoadConstant, OperatorInstruction,
LoadConstant, OperatorInstruction, OperatorInstruction, RegToSlot, Label,
OperatorInstruction, OperatorInstruction, LoadConstant, OperatorInstruction, LoadConstant,
Transfer, OperatorInstruction, OperatorInstruction, Transfer, LoadConstant,
OperatorInstruction, LoadConstant, OperatorInstruction, OperatorInstruction, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, FunctionReturn, Transfer, Syscall,
NilClass]
assert_equal 1 , get_return
end
def ttest_call_main
call_ins = ticks(9)
def test_call_main
call_ins = ticks(25)
assert_equal FunctionCall , call_ins.class
assert :main , call_ins.method.name
end
def ttest_load_5
load_ins = ticks 11
def test_load_15
load_ins = ticks 43
assert_equal LoadConstant , load_ins.class
assert_equal 5 , @interpreter.get_register(load_ins.register).value
assert_equal 15 , @interpreter.get_register(load_ins.register)
end
def ttest_transfer
transfer = ticks(19)
assert_equal Transfer , transfer.class
end
def ttest_sys
sys = ticks(20)
def test_sys
sys = ticks(105)
assert_equal Syscall , sys.class
assert_equal :exit , sys.name
end
def ttest_return
ret = ticks(18)
def test_return
ret = ticks(91)
assert_equal FunctionReturn , ret.class
link = @interpreter.get_register( ret.register )
assert_equal Label , link.class