fix mod4 name

really did div4
This commit is contained in:
Torsten Ruger
2018-04-19 10:00:55 +03:00
parent 8e1efa3993
commit 3a50b7dd0e
21 changed files with 41 additions and 39 deletions

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@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "r = 5.mod4"
@input = "r = 5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,

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@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "@a.mod4"
@input = "@a.div4"
@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
OperatorInstruction, IsZero, SlotToReg, SlotToReg, SlotToReg,
LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg,

View File

@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "5.mod4"
@input = "5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,
@ -32,7 +32,7 @@ module Risc
def test_function_call
produced = produce_body
assert_equal FunctionCall , produced.next(23).class
assert_equal :mod4 , produced.next(23).method.name
assert_equal :div4 , produced.next(23).method.name
end
def test_check_continue
produced = produce_body

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@ -7,7 +7,7 @@ module Risc
def setup
super
@input = "5.mod4"
@input = "5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,
@ -22,7 +22,7 @@ module Risc
def test_load_method
method = @produced
assert_load( method, Parfait::TypedMethod ,:r1)
assert_equal :mod4 , method.constant.name
assert_equal :div4 , method.constant.name
end
def test_load_space
space = @produced.next(1)

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@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "return 5.mod4"
@input = "return 5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,

View File

@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "return @a.mod4"
@input = "return @a.div4"
@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
IsZero, SlotToReg, SlotToReg, LoadConstant, RegToSlot,
LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,