fix mod4 name

really did div4
This commit is contained in:
Torsten Ruger
2018-04-19 10:00:55 +03:00
parent 8e1efa3993
commit 3a50b7dd0e
21 changed files with 41 additions and 39 deletions

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@ -54,7 +54,7 @@ class Integer < Value
return self
end
int mod4()
int div4()
return self & 3
end

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@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "r = 5.mod4"
@input = "r = 5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,

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@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "@a.mod4"
@input = "@a.div4"
@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
OperatorInstruction, IsZero, SlotToReg, SlotToReg, SlotToReg,
LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg,

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@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "5.mod4"
@input = "5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,
@ -32,7 +32,7 @@ module Risc
def test_function_call
produced = produce_body
assert_equal FunctionCall , produced.next(23).class
assert_equal :mod4 , produced.next(23).method.name
assert_equal :div4 , produced.next(23).method.name
end
def test_check_continue
produced = produce_body

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@ -7,7 +7,7 @@ module Risc
def setup
super
@input = "5.mod4"
@input = "5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,
@ -22,7 +22,7 @@ module Risc
def test_load_method
method = @produced
assert_load( method, Parfait::TypedMethod ,:r1)
assert_equal :mod4 , method.constant.name
assert_equal :div4 , method.constant.name
end
def test_load_space
space = @produced.next(1)

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@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "return 5.mod4"
@input = "return 5.div4"
@expect = [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,

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@ -6,7 +6,7 @@ module Risc
def setup
super
@input = "return @a.mod4"
@input = "return @a.div4"
@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
IsZero, SlotToReg, SlotToReg, LoadConstant, RegToSlot,
LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,

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@ -5,7 +5,7 @@ module Risc
include Ticker
def setup
@string_input = as_main("a = 5 ; return a.mod4")
@string_input = as_main("a = 5 ; return a.div4")
super
end

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@ -5,7 +5,7 @@ module Risc
include Ticker
def setup
@string_input = as_main "return 9.mod4"
@string_input = as_main "return 9.div4"
super
end

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@ -66,7 +66,7 @@ module Vool
end
def test_int_receiver
sent = RubyCompiler.compile( "5.mod4")
sent = RubyCompiler.compile( "5.div4")
assert_equal Parfait::Type , sent.receiver.ct_type.class
assert_equal "Integer_Type" , sent.receiver.ct_type.name
end

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@ -7,7 +7,7 @@ module Vool
def setup
Risc.machine.boot
@ins = compile_first_method( "a = 5; a.mod4")
@ins = compile_first_method( "a = 5; a.div4")
end
def test_check_type
assert_equal NotSameCheck , @ins.next.class , @ins

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@ -8,13 +8,13 @@ module Vool
def setup
Risc.machine.boot
@ins = compile_first_method( "5.mod4")
@ins = compile_first_method( "5.div4")
end
def receiver
[Mom::IntegerConstant , 5]
end
def test_call_has_right_method
assert_equal :mod4, @ins.next(2).method.name
assert_equal :div4, @ins.next(2).method.name
end
end

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@ -8,7 +8,7 @@ module Vool
def setup
Risc.machine.boot
@ins = compile_first_method( "5.mod4(1,2)")
@ins = compile_first_method( "5.div4(1,2)")
end
def receiver

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@ -8,7 +8,7 @@ module Vool
def setup
Risc.machine.boot
@ins = compile_first_method( "if(5.mod4) ; @a = 6 ; else; @a = 5 ; end")
@ins = compile_first_method( "if(5.div4) ; @a = 6 ; else; @a = 5 ; end")
end
def test_condition
@ -19,7 +19,7 @@ module Vool
end
def test_hoisted_dynamic_call
assert_equal SimpleCall , @ins.next(2).class
assert_equal :mod4 , @ins.next(2).method.name
assert_equal :div4 , @ins.next(2).method.name
end
def test_array
check_array [MessageSetup, ArgumentTransfer, SimpleCall, SlotLoad, TruthCheck, Label ,

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@ -44,7 +44,7 @@ module Vool
def setup
Risc.machine.boot
@ins = compile_first_method( "return 5.mod4")
@ins = compile_first_method( "return 5.div4")
end
def test_return_is_last

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@ -8,7 +8,7 @@ module Vool
def setup
Risc.machine.boot
@ins = compile_first_method( "while(5.mod4) ; 5.mod4 ; end")
@ins = compile_first_method( "while(5.div4) ; 5.div4 ; end")
end
def test_condition_compiles_to_check