use translator and remove passes

the only passes that were left were reg -> arm
those are almost completely one to one, so the idea of passes didn’t fit
This commit is contained in:
Torsten Ruger
2015-10-24 17:11:18 +03:00
parent a871f96630
commit 3774f8a5a2
2 changed files with 24 additions and 25 deletions

View File

@ -1,6 +1,15 @@
module Arm
class Translator
# translator should translate from register instructio set to it's own (arm eg)
# for each instruction we call the translator with translate_XXX
# with XXX being the class name.
# the result is replaced in the stream
def translate instruction
class_name = instruction.class.name.split("::").last
self.send( "translate_#{class_name}".to_sym , instruction)
end
# don't replace labels
def translate_Label code
nil
@ -52,8 +61,9 @@ module Arm
# The only target for a call is a Block, so we just need to get the address for the code
# and branch to it.
def translate_Branch code
ArmMachine.b( code.block )
ArmMachine.b( code.label )
end
def translate_Syscall code
call_codes = { :putstring => 4 , :exit => 1 }
int_code = call_codes[code.name]