ruby-x/rubyx
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

fix logic instruction arguments

Browse Source
This commit is contained in:
Torsten Ruger
2014-05-18 12:18:57 +03:00
parent 6abd10f278
commit 2be96dccdc
9 changed files with 69 additions and 61 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
lib/arm/arm_machine.rb
View File

@@ -11,27 +11,27 @@ module Arm
class ArmMachine < Vm::CMachine
def integer_less_or_equal block , first , right
block << cmp( first , right: right )
block << cmp( first , right )
Vm::Bool.new
end
def integer_plus block , result , first , right
block << add( result , left: first , :extra => right )
block << add( result , first , right )
result
end
def integer_minus block , result , first , right
block << sub( result , left: first , :extra => right )
block << sub( result , first , right )
result
end
def integer_load block , first , right
block << mov( first , right: right )
block << mov( first , right )
first
end
def integer_move block , first , right
block << mov( first , right: right )
block << mov( first , right )
first
end
@@ -82,17 +82,17 @@ module Arm
# And coding it is a bit of a mind leap: it's all about finding a a result that gets the
# remainder smaller than an int. i'll post some links sometime. This is from the arm manual
block.instance_eval do
sub( remainder , left: number , right: 10 )
sub( number , left: number , right: number , shift_lsr: 2)
add( number , left: number , right: number , shift_lsr: 4)
add( number , left: number , right: number , shift_lsr: 8)
add( number , left: number , right: number , shift_lsr: 16)
mov( number , right: number , shift_lsr: 3)
sub( remainder , number , 10 )
sub( number , number , number , shift_lsr: 2)
add( number , number , number , shift_lsr: 4)
add( number , number , number , shift_lsr: 8)
add( number , number , number , shift_lsr: 16)
mov( number , number , shift_lsr: 3)
tmp = Vm::Integer.new( remainder.register + 1)
add( tmp , left: number , right: number , shift_lsl: 2)
sub( remainder , left: remainder , right: tmp , shift_lsl: 1 , update_status: 1)
add( number , left: number, right: 1 , condition_code: :pl )
add( remainder , left: remainder , right: 10 , condition_code: :mi )
add( tmp , number , number , shift_lsl: 2)
sub( remainder , remainder , tmp , shift_lsl: 1 , update_status: 1)
add( number , number, 1 , condition_code: :pl )
add( remainder , remainder , 10 , condition_code: :mi )
end
end

9
lib/arm/logic_instruction.rb
View File

@@ -3,13 +3,12 @@ module Arm
class LogicInstruction < Vm::LogicInstruction
include Arm::Constants
def initialize(first , attributes)
super(first , attributes)
def initialize(result , left , right , attributes)
super(result ,left , right , attributes)
@attributes[:update_status] = 0 if @attributes[:update_status] == nil
@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
@operand = 0
@left = @attributes[:left]
raise "Left arg must be given #{inspect}" unless @left
@immediate = 0
end
@@ -21,7 +20,7 @@ module Arm
# Build representation for source value
def build
right = @attributes[:right]
right = @right
if @left.is_a?(Vm::StringConstant)
# do pc relative addressing with the difference to the instuction
# 8 is for the funny pipeline adjustment (ie pointing to fetch and not execute)
@@ -57,7 +56,7 @@ module Arm
build
instuction_class = 0b00 # OPC_DATA_PROCESSING
val = shift(@operand , 0)
val |= shift(reg_code(@first) , 12)
val |= shift(reg_code(@result) , 12)
val |= shift(reg_code(@left) , 12+4)
val |= shift(@attributes[:update_status] , 12+4+4)#20
val |= shift(op_bit_code , 12+4+4 +1)