comment unused code
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@ -48,28 +48,7 @@ module Arm
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operand = arg
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operand = arg
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immediate = 0
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immediate = 0
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elsif (arg.is_a?(Arm::Shift))
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elsif (arg.is_a?(Arm::Shift))
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rm_ref = arg.argument
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# handle_shift
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immediate = 0
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shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
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'ror' => 0b110, 'rrx' => 0b110}[arg.type]
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if (arg.type == 'ror' and arg.value.nil?)
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# ror #0 == rrx
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raise "cannot rotate by zero #{arg} #{inspect}"
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end
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arg1 = arg.value
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if (arg1.is_a?(Register::IntegerConstant))
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if (arg1.value >= 32)
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raise "cannot shift by more than 31 #{arg1} #{inspect}"
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end
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shift_imm = arg1.value
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elsif (arg1.is_a?(Arm::Register))
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shift_op val |= 0x1;
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shift_imm = arg1.number << 1
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elsif (arg.type == 'rrx')
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shift_imm = 0
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end
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operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
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else
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else
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raise "invalid operand argument #{arg.inspect} , #{inspect}"
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raise "invalid operand argument #{arg.inspect} , #{inspect}"
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end
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end
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@ -88,6 +67,33 @@ module Arm
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io.write_uint32 val
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io.write_uint32 val
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end
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end
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# Arms special shift abilities are not modelled in the register level
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# So they would have to be used inoptimisations, that are not implemented
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# in short unused code
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def handle_shift
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# rm_ref = arg.argument
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# immediate = 0
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# shift_op = {'lsl' => 0b000, 'lsr' => 0b010, 'asr' => 0b100,
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# 'ror' => 0b110, 'rrx' => 0b110}[arg.type]
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# if (arg.type == 'ror' and arg.value.nil?)
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# # ror #0 == rrx
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# raise "cannot rotate by zero #{arg} #{inspect}"
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# end
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#
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# arg1 = arg.value
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# if (arg1.is_a?(Register::IntegerConstant))
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# if (arg1.value >= 32)
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# raise "cannot shift by more than 31 #{arg1} #{inspect}"
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# end
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# shift_imm = arg1.value
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# elsif (arg1.is_a?(Arm::Register))
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# shift_op val |= 0x1;
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# shift_imm = arg1.number << 1
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# elsif (arg.type == 'rrx')
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# shift_imm = 0
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# end
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# operand = rm_ref | (shift_op << 4) | (shift_imm << 4+3)
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end
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def to_s
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def to_s
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"#{opcode} #{@left} , #{@right} #{super}"
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"#{opcode} #{@left} , #{@right} #{super}"
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end
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end
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