fix all test

and thus all green, two weeks of side branch positioning  done
(luckily not on arm, but interpreter)
This commit is contained in:
Torsten Ruger
2018-05-25 20:40:39 +03:00
parent c0cd1e0740
commit 1c09d4202f
25 changed files with 348 additions and 326 deletions

View File

@ -13,11 +13,11 @@ module Risc
#show_main_ticks # get output of what is in main
check_main_chain [LoadConstant, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
LoadConstant, OperatorInstruction, IsZero, LoadConstant, OperatorInstruction,
IsZero, LoadConstant, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, LoadConstant, OperatorInstruction, IsZero,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, FunctionReturn, Transfer,
Syscall, NilClass]
IsZero, LoadConstant, SlotToReg, Branch, RegToSlot,
Branch, SlotToReg, SlotToReg, LoadConstant, OperatorInstruction,
IsZero, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, FunctionReturn,
Transfer, Syscall, NilClass]
assert_kind_of Parfait::FalseClass , get_return
end
def test_load_false_const
@ -54,7 +54,7 @@ module Risc
assert check.label.name.start_with?("merge_label") , check.label.name
end
def test_exit
done = main_ticks(31)
done = main_ticks(32)
assert_equal Syscall , done.class
end
end