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fix all test

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and thus all green, two weeks of side branch positioning  done
(luckily not on arm, but interpreter)
This commit is contained in:
Torsten Ruger
2018-05-25 20:40:39 +03:00
parent c0cd1e0740
commit 1c09d4202f
25 changed files with 348 additions and 326 deletions
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25
test/risc/interpreter/conditional/test_if_smaller.rb
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@ -13,22 +13,23 @@ module Risc
#show_main_ticks # get output of what is in main
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
SlotToReg, FunctionCall, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, OperatorInstruction, IsMinus, IsZero,
LoadConstant, RegToSlot, SlotToReg, SlotToReg, RegToSlot,
SlotToReg, SlotToReg, FunctionReturn, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, LoadConstant, OperatorInstruction,
IsZero, LoadConstant, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, FunctionReturn, Transfer,
Syscall, NilClass]
RegToSlot, SlotToReg, RegToSlot, Branch, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, Branch, FunctionCall, SlotToReg,
SlotToReg, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction,
IsMinus, IsZero, LoadConstant, RegToSlot, SlotToReg,
Branch, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, LoadConstant, OperatorInstruction, IsZero, LoadConstant,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, Branch,
SlotToReg, SlotToReg, FunctionReturn, Transfer, Syscall,
NilClass]
assert_equal Parfait::Word , get_return.class
assert_equal "else" , get_return.to_string
end
def test_exit
done = main_ticks(61)
done = main_ticks(65)
assert_equal Syscall , done.class
end
end