fix all test

and thus all green, two weeks of side branch positioning  done
(luckily not on arm, but interpreter)
This commit is contained in:
Torsten Ruger
2018-05-25 20:40:39 +03:00
parent c0cd1e0740
commit 1c09d4202f
25 changed files with 348 additions and 326 deletions

View File

@ -13,19 +13,20 @@ module Risc
#show_main_ticks # get output of what is
check_main_chain [LoadConstant, LoadConstant, SlotToReg, RegToSlot, RegToSlot,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, SlotToReg, RegToSlot,
LoadConstant, SlotToReg, RegToSlot, LoadConstant, SlotToReg,
RegToSlot, SlotToReg, FunctionCall, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, SlotToReg, SlotToReg, LoadData,
OperatorInstruction, LoadData, OperatorInstruction, OperatorInstruction, LoadData,
Transfer, OperatorInstruction, OperatorInstruction, LoadData, Transfer,
OperatorInstruction, OperatorInstruction, LoadData, Transfer, OperatorInstruction,
OperatorInstruction, LoadData, OperatorInstruction, LoadData, Transfer,
OperatorInstruction, OperatorInstruction, Transfer, LoadData, OperatorInstruction,
LoadData, OperatorInstruction, OperatorInstruction, LoadConstant, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, RegToSlot, SlotToReg, SlotToReg, FunctionReturn,
SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, RegToSlot, Branch, SlotToReg,
RegToSlot, LoadConstant, SlotToReg, RegToSlot, LoadConstant,
SlotToReg, RegToSlot, SlotToReg, FunctionCall, SlotToReg,
SlotToReg, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
LoadData, OperatorInstruction, LoadData, OperatorInstruction, OperatorInstruction,
LoadData, Transfer, Branch, OperatorInstruction, OperatorInstruction,
LoadData, Transfer, OperatorInstruction, OperatorInstruction, LoadData,
Transfer, OperatorInstruction, OperatorInstruction, LoadData, OperatorInstruction,
LoadData, Branch, Transfer, OperatorInstruction, OperatorInstruction,
Transfer, LoadData, OperatorInstruction, LoadData, OperatorInstruction,
OperatorInstruction, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
Branch, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, FunctionReturn, SlotToReg,
SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
RegToSlot, SlotToReg, SlotToReg, RegToSlot, SlotToReg,
SlotToReg, FunctionReturn, Transfer, Syscall, NilClass]
assert_equal Parfait::Integer , get_return.class
@ -33,18 +34,18 @@ module Risc
end
def test_load_25
load_ins = main_ticks 16
load_ins = main_ticks 17
assert_equal LoadConstant , load_ins.class
assert_equal 25 , @interpreter.get_register(load_ins.register).value
end
def test_return
ret = main_ticks(70)
ret = main_ticks(74)
assert_equal FunctionReturn , ret.class
link = @interpreter.get_register( ret.register )
assert_equal Label , link.class
end
def test_sys
sys = main_ticks(84)
sys = main_ticks(89)
assert_equal Syscall , sys.class
assert_equal :exit , sys.name
end