move all arm instructions to own folder and fold inheritance
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lib/arm/instruction.rb
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27
lib/arm/instruction.rb
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@ -0,0 +1,27 @@
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module Arm
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# The arm machine has following instruction classes
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# - Memory
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# - Stack
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# - Logic
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# - Math
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# - Control/Compare
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# - Move
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# - Call class Instruction
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class Instruction
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def initialize options
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@attributes = options
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end
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attr_reader :attributes
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def opcode
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@attributes[:opcode]
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end
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end
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end
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require_relative "constants"
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require_relative "instructions/call_instruction"
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require_relative "instructions/compare_instruction"
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require_relative "instructions/logic_instruction"
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require_relative "instructions/memory_instruction"
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require_relative "instructions/move_instruction"
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require_relative "instructions/stack_instruction"
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@ -1,5 +1,3 @@
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require_relative "nodes"
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module Arm
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# There are only three call instructions in arm branch (b), call (bl) and syscall (swi)
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@ -11,12 +9,21 @@ module Arm
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# swi (SoftWareInterrupt) or system call is how we call the kernel.
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# in Arm the register layout is different and so we have to place the syscall code into register 7
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# Registers 0-6 hold the call values as for a normal c call
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class CallInstruction < ::Register::CallInstruction
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class CallInstruction < Instruction
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include Arm::Constants
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def initialize(first, attributes)
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super(first , attributes)
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super(attributes)
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@first = first
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opcode = @attributes[:opcode].to_s
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if opcode.length == 3 and opcode[0] == "b"
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@attributes[:condition_code] = opcode[1,2].to_sym
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@attributes[:opcode] = :b
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end
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if opcode.length == 6 and opcode[0] == "c"
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@attributes[:condition_code] = opcode[4,2].to_sym
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@attributes[:opcode] = :call
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end
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@attributes[:update_status] = 0
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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end
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@ -64,5 +71,22 @@ module Arm
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end
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end
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end#class
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def uses
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if opcode == :call
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@first.args.collect {|arg| arg.register }
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else
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[]
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end
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end
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def assigns
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if opcode == :call
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[RegisterReference.new(RegisterMachine.instance.return_register)]
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else
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[]
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end
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end
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def to_s
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"#{opcode} #{@first.to_asm} #{super}"
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end
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end
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end
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@ -1,9 +1,11 @@
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module Arm
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class CompareInstruction < Register::CompareInstruction
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class CompareInstruction < Instruction
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include Arm::Constants
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def initialize(left , right , attributes)
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super(left , right, attributes)
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super(attributes)
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@left = left
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@right = right.is_a?(Fixnum) ? IntegerConstant.new(right) : right
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@operand = 0
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@immediate = 0
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@ -87,5 +89,17 @@ module Arm
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raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
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val << by
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end
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def uses
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ret = [@left.register ]
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ret << @right.register unless @right.is_a? Constant
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ret
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end
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def assigns
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[]
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end
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def to_s
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"#{opcode} #{@left.to_asm} , #{@right.to_asm} #{super}"
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end
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end
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end
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@ -1,10 +1,16 @@
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module Arm
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class LogicInstruction < Register::LogicInstruction
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class LogicInstruction < Instruction
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include Arm::Constants
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# result = left op right
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#
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# Logic instruction are your basic operator implementation. But unlike the (normal) code we write
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# these Instructions must have "place" to write their results. Ie when you write 4 + 5 in ruby
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# the result is sort of up in the air, but with Instructions the result must be assigned
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def initialize(result , left , right , attributes = {})
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super(result ,left , right , attributes)
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super(attributes)
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@result = result
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@left = left
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@right = right.is_a?(Fixnum) ? Virtual::IntegerConstant.new(right) : right
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@attributes[:update_status] = 0 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@operand = 0
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@ -13,6 +19,7 @@ module Arm
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@immediate = 0
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end
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attr_accessor :result , :left , :right
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def assemble(io)
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# don't overwrite instance variables, to make assembly repeatable
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left = @left
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@ -64,5 +71,15 @@ module Arm
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raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
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val << by
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end
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def uses
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ret = []
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ret << @left.register if @left and not @left.is_a? Constant
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ret << @right.register if @right and not @right.is_a?(Constant)
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ret
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end
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def assigns
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[@result.register]
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end
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end
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end
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@ -1,13 +1,14 @@
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require_relative "nodes"
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module Arm
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# ADDRESSING MODE 2
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# Implemented: immediate offset with offset=0
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class MemoryInstruction < ::Register::MemoryInstruction
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include Arm::Constants
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def initialize(result , left , right = nil , attributes = {})
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super(result , left , right , attributes)
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class MemoryInstruction < Instruction
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include Arm::Constants
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def initialize result , left , right = nil , attributes = {}
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super(attributes)
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@result = result
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@left = left
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@right = right
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@attributes[:update_status] = 0 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@operand = 0
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@ -98,5 +99,14 @@ module Arm
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raise "Not integer #{val}:#{val.class} #{inspect}" unless val.is_a? Fixnum
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val << by
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end
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def uses
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ret = [@left.register ]
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ret << @right.register unless @right.nil?
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ret
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end
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def assigns
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[@result.register]
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end
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end
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end
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@ -1,10 +1,12 @@
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module Arm
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class MoveInstruction < Register::MoveInstruction
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class MoveInstruction < Instruction
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include Arm::Constants
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def initialize(to , from , attributes)
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super(to , from , attributes)
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def initialize to , from , options = {}
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super(options)
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@to = to
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@from = from.is_a?(Fixnum) ? Virtual::IntegerConstant.new(from) : from
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raise "move must have from set #{inspect}" unless from
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@attributes[:update_status] = 0 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@attributes[:opcode] = attributes[:opcode]
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@ -15,6 +17,7 @@ module Arm
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@from = Virtual::IntegerConstant.new( @from ) if( @from.is_a? Fixnum )
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@extra = nil
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end
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attr_accessor :to , :from
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# arm intructions are pretty sensible, and always 4 bytes (thumb not supported)
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# but not all constants fit into the part of the instruction that is left after the instruction code,
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@ -103,5 +106,12 @@ module Arm
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raise "Not integer #{val}:#{val.class} in #{inspect}" unless val.is_a? Fixnum
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val << by
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end
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def uses
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@from.is_a?(Constant) ? [] : [@from.register]
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end
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def assigns
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[@to.register]
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end
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end
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end
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@ -1,12 +1,12 @@
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require_relative "constants"
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module Arm
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# ADDRESSING MODE 4
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class StackInstruction < Register::StackInstruction
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class StackInstruction < Instruction
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include Arm::Constants
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def initialize(first , attributes)
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super(first , attributes)
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super(attributes)
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@first = first
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@attributes[:update_status] = 0 if @attributes[:update_status] == nil
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@attributes[:condition_code] = :al if @attributes[:condition_code] == nil
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@attributes[:opcode] = attributes[:opcode]
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@ -56,5 +56,25 @@ module Arm
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val |= (cond << 16+4+ 1+1+1+1 +2+2)
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io.write_uint32 val
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end
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def is_push?
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opcode == :push
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end
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def is_pop?
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!is_push?
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end
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def uses
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is_push? ? regs : []
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end
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def assigns
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is_pop? ? regs : []
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end
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def regs
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@first
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end
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def to_s
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"#{opcode} [#{@first.collect {|f| f.to_asm}.join(',') }] #{super}"
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end
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end
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end
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