shaves an instruction off resolve_method

by loading nil directly,  not space first
This commit is contained in:
Torsten Ruger 2018-09-01 11:20:59 +03:00
parent c3b026a180
commit 0a390cc5a9
7 changed files with 61 additions and 66 deletions

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@ -101,9 +101,6 @@ module Arm
right = Risc::Position.get(left) - 8 right = Risc::Position.get(left) - 8
right -= Risc::Position.get(self).at right -= Risc::Position.get(self).at
if( (right < 0) && ((opcode == :add) || (opcode == :sub)) ) if( (right < 0) && ((opcode == :add) || (opcode == :sub)) )
puts "Inverting, was #{right} , new #{-1*right}"
puts "left #{left.class} #{Risc::Position.get(left)}"
puts "self #{Risc::Position.get(self)}"
right *= -1 # this works as we never issue sub only add right *= -1 # this works as we never issue sub only add
set_opcode :sub # so (as we can't change the sign permanently) we can change the opcode set_opcode :sub # so (as we can't change the sign permanently) we can change the opcode
end # and the sign even for sub (beucase we created them) end # and the sign even for sub (beucase we created them)

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@ -45,9 +45,8 @@ module Mom
add_code while_start_label add_code while_start_label
space! << Parfait.object_space object! << Parfait.object_space.nil_object
space << space[:nil_object] object - callable_method
space - callable_method
if_zero exit_label if_zero exit_label
name! << callable_method[:name] name! << callable_method[:name]

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@ -103,7 +103,9 @@ module Risc
def prerun def prerun
assemblers.each do |asm| assemblers.each do |asm|
asm.instructions.each {|i| i.precheck } asm.instructions.each do |ins|
ins.precheck
end
end end
end end

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@ -10,16 +10,15 @@ module Risc
@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg, @expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
OperatorInstruction, IsZero, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction, IsZero, SlotToReg, SlotToReg, SlotToReg,
LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg, LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg,
SlotToReg, Label, LoadConstant, SlotToReg, OperatorInstruction, SlotToReg, Label, LoadConstant, OperatorInstruction, IsZero,
IsZero, SlotToReg, OperatorInstruction, IsZero, SlotToReg, SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch,
Branch, Label, Transfer, Syscall, Transfer, Label, Transfer, Syscall, Transfer, Transfer,
Transfer, LoadConstant, SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot, RegToSlot,
RegToSlot, RegToSlot, Label, RegToSlot, Label, RegToSlot, Label, RegToSlot, Label, LoadConstant,
LoadConstant, SlotToReg, LoadConstant, SlotToReg, SlotToReg, SlotToReg, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, RegToSlot, SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, LoadConstant, SlotToReg, DynamicJump, SlotToReg, LoadConstant, SlotToReg, DynamicJump, Label]
Label]
end end
def test_send_instructions def test_send_instructions
@ -27,23 +26,23 @@ module Risc
end end
def test_sys def test_sys
produced = produce_body produced = produce_body
assert_equal Syscall , produced.next(28).class assert_equal Syscall , produced.next(27).class
assert_equal :exit , produced.next(28).name assert_equal :exit , produced.next(27).name
end end
def test_load_address def test_load_address
produced = produce_body produced = produce_body
assert_equal LoadConstant , produced.next(40).class assert_equal LoadConstant , produced.next(41).class
assert_equal Parfait::CacheEntry , produced.next(40).constant.class assert_equal Parfait::Factory , produced.next(41).constant.class
end end
def test_function_call def test_function_call
produced = produce_body produced = produce_body
assert_equal DynamicJump , produced.next(59).class assert_equal DynamicJump , produced.next(58).class
end end
def test_cache_check def test_cache_check
produced = produce_body produced = produce_body
assert_equal IsZero , produced.next(6).class assert_equal IsZero , produced.next(6).class
assert_equal Label , produced.next(39).class assert_equal Label , produced.next(38).class
assert_equal produced.next(39) , produced.next(6).label assert_equal produced.next(38) , produced.next(6).label
end end
end end
end end

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@ -10,17 +10,17 @@ module Risc
@expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg, @expect = [LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg,
OperatorInstruction, IsZero, SlotToReg, SlotToReg, SlotToReg, OperatorInstruction, IsZero, SlotToReg, SlotToReg, SlotToReg,
LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg, LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg,
SlotToReg, Label, LoadConstant, SlotToReg, OperatorInstruction, SlotToReg, Label, LoadConstant, OperatorInstruction, IsZero,
IsZero, SlotToReg, OperatorInstruction, IsZero, SlotToReg, SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch,
Branch, Label, Transfer, Syscall, Transfer, Label, Transfer, Syscall, Transfer, Transfer,
Transfer, LoadConstant, SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot, RegToSlot,
RegToSlot, RegToSlot, Label, RegToSlot, Label, RegToSlot, Label, RegToSlot, Label, LoadConstant,
LoadConstant, SlotToReg, LoadConstant, SlotToReg, SlotToReg, SlotToReg, LoadConstant, SlotToReg, SlotToReg, RegToSlot,
RegToSlot, RegToSlot, RegToSlot, RegToSlot, SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, RegToSlot,
RegToSlot, SlotToReg, LoadConstant, SlotToReg, DynamicJump, SlotToReg, LoadConstant, SlotToReg, DynamicJump, Label,
Label, SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg,
SlotToReg, RegToSlot, Branch] RegToSlot, Branch]
end end
def test_return_instructions def test_return_instructions
@ -28,7 +28,7 @@ module Risc
end end
def test_function_return def test_function_return
produced = produce_body produced = produce_body
assert_equal Branch , produced.next(67).class assert_equal Branch , produced.next(66).class
end end
def test_cache_check def test_cache_check
produced = produce_body produced = produce_body

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@ -15,32 +15,30 @@ module Risc
SlotToReg, SlotToReg, SlotToReg, OperatorInstruction, IsZero, # 10 SlotToReg, SlotToReg, SlotToReg, OperatorInstruction, IsZero, # 10
SlotToReg, SlotToReg, SlotToReg, Branch, LoadConstant, SlotToReg, SlotToReg, SlotToReg, Branch, LoadConstant,
RegToSlot, LoadConstant, LoadConstant, SlotToReg, SlotToReg, # 20 RegToSlot, LoadConstant, LoadConstant, SlotToReg, SlotToReg, # 20
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg, LoadConstant, OperatorInstruction, IsZero, SlotToReg, OperatorInstruction,
OperatorInstruction, IsZero, Branch, SlotToReg, Branch, # 30 IsZero, SlotToReg, Branch, Branch, LoadConstant, # 30
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg, OperatorInstruction, IsZero, SlotToReg, OperatorInstruction, IsZero,
OperatorInstruction, IsZero, Branch, SlotToReg, Branch, # 40 SlotToReg, Branch, Branch, LoadConstant, OperatorInstruction, # 40
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg, IsZero, SlotToReg, OperatorInstruction, IsZero, SlotToReg,
OperatorInstruction, IsZero, Branch, SlotToReg, Branch, # 50 Branch, Branch, LoadConstant, OperatorInstruction, IsZero, # 50
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg, SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch,
OperatorInstruction, IsZero, Branch, SlotToReg, Branch, # 60 Branch, LoadConstant, OperatorInstruction, IsZero, SlotToReg, # 60
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg, OperatorInstruction, IsZero, SlotToReg, Branch, Branch,
OperatorInstruction, IsZero, Branch, SlotToReg, Branch, # 70 LoadConstant, OperatorInstruction, IsZero, SlotToReg, OperatorInstruction, # 70
LoadConstant, SlotToReg, OperatorInstruction, IsZero, SlotToReg, IsZero, RegToSlot, LoadConstant, Branch, SlotToReg,
OperatorInstruction, IsZero, RegToSlot, Branch, LoadConstant, # 80 LoadConstant, SlotToReg, SlotToReg, RegToSlot, RegToSlot, # 80
SlotToReg, LoadConstant, SlotToReg, SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
RegToSlot, RegToSlot, RegToSlot, SlotToReg, SlotToReg, # 90 RegToSlot, LoadConstant, Branch, SlotToReg, RegToSlot, # 90
SlotToReg, RegToSlot, Branch, LoadConstant, SlotToReg, SlotToReg, LoadConstant, SlotToReg, DynamicJump, SlotToReg,
RegToSlot, SlotToReg, LoadConstant, SlotToReg, DynamicJump, # 100 SlotToReg, LoadData, OperatorInstruction, LoadConstant, SlotToReg, # 100
SlotToReg, SlotToReg, LoadData, OperatorInstruction, LoadConstant, SlotToReg, RegToSlot, RegToSlot, RegToSlot, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, RegToSlot, RegToSlot, # 110 SlotToReg, RegToSlot, Branch, LoadConstant, SlotToReg, # 110
SlotToReg, SlotToReg, RegToSlot, Branch, LoadConstant, RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg,
SlotToReg, RegToSlot, RegToSlot, SlotToReg, SlotToReg, # 120 FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg, # 120
SlotToReg, FunctionReturn, SlotToReg, SlotToReg, RegToSlot, SlotToReg, RegToSlot, Branch, SlotToReg, SlotToReg,
SlotToReg, SlotToReg, RegToSlot, Branch, Branch, # 130 RegToSlot, LoadConstant, SlotToReg, RegToSlot, RegToSlot, # 130
SlotToReg, SlotToReg, RegToSlot, LoadConstant, SlotToReg, SlotToReg, SlotToReg, SlotToReg, FunctionReturn, Transfer,
RegToSlot, RegToSlot, SlotToReg, SlotToReg, SlotToReg, # 140 SlotToReg, SlotToReg, Syscall, NilClass, ]
FunctionReturn, Transfer, SlotToReg, SlotToReg, Syscall,
NilClass, ]
assert_equal Fixnum , get_return.class assert_equal Fixnum , get_return.class
assert_equal 1 , get_return assert_equal 1 , get_return
end end
@ -57,17 +55,17 @@ module Risc
end end
def test_dyn def test_dyn
cal = main_ticks(100) cal = main_ticks(94)
assert_equal DynamicJump , cal.class assert_equal DynamicJump , cal.class
end end
def test_return def test_return
ret = main_ticks(141) ret = main_ticks(134)
assert_equal FunctionReturn , ret.class assert_equal FunctionReturn , ret.class
link = @interpreter.get_register( ret.register ) link = @interpreter.get_register( ret.register )
assert_equal Fixnum , link.class assert_equal Fixnum , link.class
end end
def test_sys def test_sys
sys = main_ticks(145) sys = main_ticks(138)
assert_equal Syscall , sys.class assert_equal Syscall , sys.class
end end
end end

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@ -1,7 +1,7 @@
require_relative "../helper" require_relative "../helper"
module Risc module Risc
class TestRegisterValue < MiniTest::Test class TestRegisterValue1 < MiniTest::Test
def setup def setup
Parfait.boot! Parfait.boot!