2016-12-09 12:20:48 +01:00
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class String
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def camelize
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self.split("_").collect( &:capitalize ).join
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end
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end
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2018-03-26 13:15:48 +02:00
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# The RiscMachine, is an abstract machine with registers. Think of it as an arm machine with
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# normal instruction names. It is not however an abstraction of existing hardware, but only
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# of that subset that we need.
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# See risc/Readme
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module Risc
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end
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2018-03-13 12:27:24 +01:00
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require_relative "risc/padding"
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require_relative "risc/positioned"
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2015-10-22 17:16:29 +02:00
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2017-01-18 19:09:43 +01:00
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require "parfait"
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2018-03-13 12:27:24 +01:00
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require_relative "risc/machine"
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require_relative "risc/method_compiler"
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2015-10-22 17:16:29 +02:00
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class Fixnum
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def fits_u8?
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self >= 0 and self <= 255
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end
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end
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2016-12-09 12:20:48 +01:00
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2018-03-13 12:27:24 +01:00
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require_relative "risc/instruction"
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require_relative "risc/register_value"
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2018-03-29 17:17:19 +02:00
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require_relative "risc/text_writer"
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2018-03-13 12:27:24 +01:00
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require_relative "risc/builtin/space"
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