2018-05-17 08:31:36 +02:00
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module Risc
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class InterpreterPlatform
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def translator
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IdentityTranslator.new
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end
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def loaded_at
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0x90
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end
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def padding
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0x100 - loaded_at
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end
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end
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class Instruction
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def nil_next
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@next = nil
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2018-05-23 17:06:55 +02:00
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self
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2018-05-17 08:31:36 +02:00
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end
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def byte_length
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4
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end
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def assemble(io)
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2018-05-17 08:49:01 +02:00
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pos = Position.get(self).at
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io.write_unsigned_int_32(pos)
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2018-05-17 08:31:36 +02:00
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end
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class Branch < Instruction
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2018-05-17 08:49:01 +02:00
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def first #some logging assumes arm
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2018-05-17 08:31:36 +02:00
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self
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end
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end
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end
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class IdentityTranslator
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def translate(code)
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2018-05-23 17:06:55 +02:00
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case code
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when Branch
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ret = code.class.new(code.source , code.label.to_cpu(self))
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2018-05-24 18:20:06 +02:00
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when LoadConstant
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const = code.constant
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const = const.to_cpu(self) if const.is_a?(Label)
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ret = LoadConstant.new(code.source , const , code.register)
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2018-05-23 17:06:55 +02:00
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else
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ret = code.dup
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2018-05-17 19:14:59 +02:00
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end
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2018-05-24 18:20:06 +02:00
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ret.nil_next
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2018-05-17 08:31:36 +02:00
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ret
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end
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end
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end
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