2018-04-05 19:10:00 +02:00
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module Risc
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module Assertions
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def assert_slot_to_reg( slot , array = nil, index = nil , register = nil)
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assert_equal SlotToReg , slot.class
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2018-04-05 19:37:03 +02:00
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assert_equal( array , slot.array.symbol , "wrong source register") if array
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assert_equal( index , slot.index, "wrong source index") if index
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assert_equal( register , slot.register.symbol, "wrong destination") if register
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end
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def assert_reg_to_slot( slot , register = nil, array = nil, index = nil )
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assert_equal RegToSlot , slot.class
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assert_equal( register , slot.register.symbol, "wrong source register") if register
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assert_equal( array , slot.array.symbol, "wrong destination register") if array
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assert_equal( index , slot.index, "wrong destination index") if index
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2018-04-05 19:10:00 +02:00
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end
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def assert_load(load , clazz = nil , register = nil)
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assert_equal LoadConstant , load.class
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assert_equal( clazz , load.constant.class) if clazz
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2018-04-05 19:37:03 +02:00
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assert_equal( register , load.register.symbol, "wrong destination register") if register
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2018-04-05 19:10:00 +02:00
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end
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end
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end
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