2014-04-16 11:03:39 +02:00
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module Asm
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2014-04-23 11:38:38 +02:00
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class Shift
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2014-04-16 11:03:39 +02:00
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attr_accessor :type, :value, :argument
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end
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2014-04-22 11:23:55 +02:00
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# Registers have off course a name (r1-16 for arm)
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# but also refer to an address. In other words they can be an operand for instructions.
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# Arm has addressing modes abound, and so can add to a register before actually using it
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# If can actually shift or indeed shift what it adds, but not implemented
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2014-04-23 11:38:38 +02:00
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class Register
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2014-04-23 22:40:35 +02:00
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attr_accessor :name , :offset , :bits
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def initialize name , bits
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2014-04-18 18:19:57 +02:00
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@name = name
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2014-04-23 22:40:35 +02:00
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@bits = bits
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2014-04-22 11:23:55 +02:00
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@offset = 0
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end
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# this is for the dsl, so we can write pretty code like r1 + 4
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# when we want to access the next word (4) after r1
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def + number
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@offset = number
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self
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2014-04-18 18:19:57 +02:00
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end
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2014-04-16 11:03:39 +02:00
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end
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2014-04-23 12:52:34 +02:00
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# maybe not used at all as code_gen::instruction raises if used.
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2014-04-20 22:48:04 +02:00
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# instead now using Arrays
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2014-04-23 11:38:38 +02:00
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class RegisterList
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2014-04-16 11:03:39 +02:00
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attr_accessor :registers
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2014-04-20 22:48:04 +02:00
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def initialize regs
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2014-04-22 10:58:17 +02:00
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@registers = regs
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2014-04-23 11:38:38 +02:00
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regs.each{ |reg| raise "not a reg #{sym} , #{reg}" unless reg.is_a?(Asm::Register) }
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2014-04-20 22:48:04 +02:00
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end
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2014-04-16 11:03:39 +02:00
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end
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2014-04-23 11:38:38 +02:00
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class NumLiteral
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2014-04-16 11:03:39 +02:00
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attr_accessor :value
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2014-04-18 18:19:57 +02:00
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def initialize val
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@value = val
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end
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2014-04-16 11:03:39 +02:00
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end
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end
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