2018-03-24 16:55:01 +01:00
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require_relative "helper"
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module Risc
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class InterpreterDynamicCall < MiniTest::Test
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include Ticker
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def setup
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2019-09-13 13:07:12 +02:00
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@preload = "Integer.div4"
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2018-04-19 09:00:55 +02:00
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@string_input = as_main("a = 5 ; return a.div4")
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2018-03-24 16:55:01 +01:00
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super
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end
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def test_chain
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2020-03-14 13:05:23 +01:00
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#show_main_ticks # get output of what is
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check_main_chain [LoadConstant, RegToSlot, LoadConstant, SlotToReg, SlotToReg, #5
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2019-08-23 14:31:22 +02:00
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SlotToReg, OperatorInstruction, IsZero, SlotToReg, SlotToReg, #10
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LoadConstant, RegToSlot, LoadConstant, LoadConstant, SlotToReg, #15
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SlotToReg, LoadConstant, OperatorInstruction, IsZero, SlotToReg, #20
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2020-03-14 13:05:23 +01:00
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OperatorInstruction, IsZero, RegToSlot, Branch, LoadConstant, #25
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SlotToReg, SlotToReg, RegToSlot, SlotToReg, SlotToReg, #30
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RegToSlot, LoadConstant, SlotToReg, LoadConstant, SlotToReg, #35
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RegToSlot, SlotToReg, DynamicJump, LoadConstant, LoadConstant, #40
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SlotToReg, OperatorInstruction, IsNotZero, SlotToReg, RegToSlot, #45
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2019-09-17 15:08:49 +02:00
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SlotToReg, SlotToReg, LoadData, OperatorInstruction, RegToSlot, #50
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RegToSlot, SlotToReg, RegToSlot, Branch, SlotToReg, #55
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2020-03-14 13:05:23 +01:00
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Branch, SlotToReg, RegToSlot, SlotToReg, SlotToReg, #60
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2019-09-17 15:08:49 +02:00
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FunctionReturn, SlotToReg, RegToSlot, Branch, SlotToReg, #65
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2020-03-14 13:05:23 +01:00
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SlotToReg, RegToSlot, SlotToReg, SlotToReg, FunctionReturn, #70
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2020-03-15 09:39:09 +01:00
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Transfer, SlotToReg, SlotToReg, Transfer ,Syscall, NilClass,] #75
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assert_equal ::Integer , get_return.class
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assert_equal 1 , get_return
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2018-03-24 16:55:01 +01:00
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end
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2020-03-14 13:05:23 +01:00
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def test_load_entry
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2019-08-23 09:20:39 +02:00
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call_ins = main_ticks(3)
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2018-04-08 21:30:18 +02:00
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assert_equal LoadConstant , call_ins.class
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assert_equal Parfait::CacheEntry , call_ins.constant.class
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2018-04-03 11:55:28 +02:00
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end
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2020-03-14 13:05:23 +01:00
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def test_dyn
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2019-09-17 15:08:49 +02:00
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cal = main_ticks(38)
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2018-04-02 15:36:43 +02:00
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assert_equal DynamicJump , cal.class
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end
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2018-03-24 16:55:01 +01:00
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end
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end
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