diff --git a/src/simulator/machine.rs b/src/simulator/machine.rs
index d1fcd3a..99c70ba 100644
--- a/src/simulator/machine.rs
+++ b/src/simulator/machine.rs
@@ -353,7 +353,6 @@ impl Machine {
 			self.int_reg.set_reg(rd, val);
 			Ok(())
 		};
-		
 		match inst.funct3 {
 			RISCV_LD_LB | RISCV_LD_LBU =>	set_reg(inst.rd, 1),
 			RISCV_LD_LH | RISCV_LD_LHU =>	set_reg(inst.rd, 2),
@@ -373,7 +372,6 @@ impl Machine {
 			);
 			Ok(())
 		};
-
 		match inst.funct3 {
 			RISCV_ST_STB => store(1),
 			RISCV_ST_STH => store(2),
@@ -402,7 +400,7 @@ impl Machine {
 			RISCV_OPI_SRI =>	if inst.funct7_smaller == RISCV_OPI_SRI_SRLI {
 									compute(&|a, b| { (a >> b) & self.shiftmask[inst.shamt as usize] as i64 }, rs1, shamt)
 								} else {
-									compute(&|a, b| { a >> b }, rs1, shamt)
+									compute(&core::ops::Shr::shr, rs1, shamt)
 								}
 			_ =>				Err(MachineError::new(format!("In OPI switch case, this should never happen... Instr was %x\n {}", inst.value).as_str()))
 		}