diff --git a/src/simulator/print.rs b/src/simulator/print.rs index 4bad5ad..a76fbd6 100644 --- a/src/simulator/print.rs +++ b/src/simulator/print.rs @@ -80,7 +80,7 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64 format!("jalr\t{},{}({})", REG_X[rd], ins.imm12_I_signed, REG_X[rs1]) }, RISCV_BR => { - format!("{}\t{}, {}, {}", NAMES_BR[ins.funct3 as usize], REG_X[rs1], REG_X[rs2], ins.imm13_signed) + format!("{}\t{},{},{:x}", NAMES_BR[ins.funct3 as usize], REG_X[rs1], REG_X[rs2], pc + (ins.imm13_signed as i32)) }, RISCV_LD => { format!("{}\t{},{}({})", NAMES_LD[ins.funct3 as usize], REG_X[rd], ins.imm12_I_signed, REG_X[rs1]) @@ -230,12 +230,12 @@ mod test { let bge: decode::Instruction = decode::decode(0b0000000_10000_10001_101_00000_1100011); let bltu: decode::Instruction = decode::decode(0b0000000_10000_10001_110_00000_1100011); let bgeu: decode::Instruction = decode::decode(0b0000000_10000_10001_111_00000_1100011); - assert_eq!("blt\ta7, a6, 0", print::print(blt, 0)); - assert_eq!("bge\ta7, a6, 0", print::print(bge, 0)); - assert_eq!("bltu\ta7, a6, 0", print::print(bltu, 0)); - assert_eq!("bgeu\ta7, a6, 0", print::print(bgeu, 0)); - assert_eq!("bne\ta7, a6, 0", print::print(bne, 0)); - assert_eq!("beq\ta7, a6, 0", print::print(beq, 0)); + assert_eq!("blt\ta7,a6,0", print::print(blt, 0)); + assert_eq!("bge\ta7,a6,0", print::print(bge, 0)); + assert_eq!("bltu\ta7,a6,0", print::print(bltu, 0)); + assert_eq!("bgeu\ta7,a6,0", print::print(bgeu, 0)); + assert_eq!("bne\ta7,a6,0", print::print(bne, 0)); + assert_eq!("beq\ta7,a6,0", print::print(beq, 0)); } #[test] @@ -283,7 +283,7 @@ mod test { #[test] fn test_fibo() { assert_eq!("jal zero,10504", print::print(decode::decode(0x0500006f), 0x104b4)); - //assert_eq!("blt a4,a5,104b8", print::print(decode::decode(0xfaf740e3), 0x10518)); + assert_eq!("blt a4,a5,104b8", print::print(decode::decode(0xfaf740e3), 0x10518)); } } \ No newline at end of file