Add thread save and restore processor context

src/simulator/machine.rs

@@ -616,6 +616,22 @@ impl Machine {
 		machine.pc += 8;
 
 	}
+
+	pub fn read_int_register(&self, index: usize) -> i64 {
+		self.int_reg.get_reg(index)
+	}
+
+	pub fn read_fp_register(&self, index: usize) -> f32 {
+		self.fp_reg.get_reg(index)
+	}
+
+	pub fn write_int_register(&mut self, index: usize, value: i64) {
+		self.int_reg.set_reg(index, value);
+	}
+	
+	pub fn write_fp_register(&mut self, index: usize, value: f32) {
+		self.fp_reg.set_reg(index, value);
+	}
 }
 
 #[cfg(test)]