diff --git a/src/simulator/machine.rs b/src/simulator/machine.rs
index 73fc9f3..000a1fe 100644
--- a/src/simulator/machine.rs
+++ b/src/simulator/machine.rs
@@ -211,17 +211,16 @@ impl Machine {
 			RISCV_ST => {
 				match inst.funct3 {
 					RISCV_ST_STB => {
-
-						todo!("Write memory here");
+						Self::write_memory(machine, 1, (machine.int_reg[inst.rs1 as usize] + inst.imm12_S_signed as i64) as usize, machine.int_reg[inst.rs2 as usize] as u64); // Possible bugs à cause du cast ici 
 					},
 					RISCV_ST_STH => {
-						todo!("Write memory here");
+						Self::write_memory(machine, 2, (machine.int_reg[inst.rs1 as usize] + inst.imm12_S_signed as i64) as usize, machine.int_reg[inst.rs2 as usize] as u64);
 					},
 					RISCV_ST_STW => {
-						todo!("Write memory here");
+						Self::write_memory(machine, 4, (machine.int_reg[inst.rs1 as usize] + inst.imm12_S_signed as i64) as usize, machine.int_reg[inst.rs2 as usize] as u64);
 					},
 					RISCV_ST_STD => {
-						todo!("Write memory here");
+						Self::write_memory(machine, 8, (machine.int_reg[inst.rs1 as usize] + inst.imm12_S_signed as i64) as usize, machine.int_reg[inst.rs2 as usize] as u64);
 					},
 					_ => {
 						panic!("In ST switch case, this should never happen... Instr was {}", inst.value);
@@ -257,7 +256,7 @@ impl Machine {
 							machine.int_reg[inst.rd as usize] = machine.int_reg[inst.rs1 as usize] >> inst.shamt;	
 						}
 					}
-					_ => { panic!("{} inconnu", inst.funct3); }
+					_ => { panic!("In OPI switch case, this should never happen... Instr was %x\n {}", inst.value); }
 				}
 			},