From 7ed53261a0c073ce9e5af3e61c25ffd0ea905eed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fran=C3=A7ois=20Autin?= Date: Fri, 24 Mar 2023 19:02:50 +0100 Subject: [PATCH] :memo: Documentation updates --- src/simulator/error.rs | 16 ++++++++++++++++ src/simulator/machine.rs | 13 +++++++++++++ src/simulator/mod.rs | 9 +++++---- src/simulator/register.rs | 13 +++++-------- 4 files changed, 39 insertions(+), 12 deletions(-) diff --git a/src/simulator/error.rs b/src/simulator/error.rs index 4794315..3d922a9 100644 --- a/src/simulator/error.rs +++ b/src/simulator/error.rs @@ -1,3 +1,19 @@ +//! # Error +//! +//! This module contains the definition of the MachineError struct, +//! for error management in the Machine module. +//! +//! Basic usage: +//! +//! ``` +//! fn example(x: bool) -> Result<(), MachineError> { +//! match x { +//! true => Ok(()), +//! _ => Err(MachineError::new("Machine failed because of ...")); +//! } +//! } +//! ``` + use std::fmt; /// Machine Error diff --git a/src/simulator/machine.rs b/src/simulator/machine.rs index 740ae94..8cb3b8c 100644 --- a/src/simulator/machine.rs +++ b/src/simulator/machine.rs @@ -1,3 +1,16 @@ +//! # Machine +//! +//! This module contains a RISC-V simulator. +//! It supports the base instruction set along +//! with 32bit floating point operations. +//! +//! Basic usage: +//! +//! ``` +//! let mut machine = Machine::init_machine(); +//! machine.run(); +//! ``` + use std::{ io::Write, fs::File diff --git a/src/simulator/mod.rs b/src/simulator/mod.rs index 956ee64..037d545 100644 --- a/src/simulator/mod.rs +++ b/src/simulator/mod.rs @@ -9,6 +9,7 @@ pub mod translationtable; pub mod mmu; pub mod register; +/// Definition of global constants pub mod global { #![allow(dead_code)] @@ -54,15 +55,15 @@ pub mod global { /// /// See func3 to know the type of instruction (LD, LW, LH, LB, LWU, LHU, LBU) pub const RISCV_LD: u8 = 0x3; - // Store instructions + /// Store instructions pub const RISCV_ST: u8 = 0x23; - // immediate Arithmetic operations + /// immediate Arithmetic operations pub const RISCV_OPI: u8 = 0x13; - // Arithmetic operations + /// Arithmetic operations pub const RISCV_OP: u8 = 0x33; /// Immediate arithmetic operations for rv64i pub const RISCV_OPIW: u8 = 0x1b; - // Arithmetic operations for rv64i + /// Arithmetic operations for rv64i pub const RISCV_OPW: u8 = 0x3b; /// Type: B diff --git a/src/simulator/register.rs b/src/simulator/register.rs index a0ef372..339c0e5 100644 --- a/src/simulator/register.rs +++ b/src/simulator/register.rs @@ -1,5 +1,9 @@ -use crate::simulator::machine::{NUM_FP_REGS, NUM_INT_REGS}; +//! # Register +//! +//! This mod contains the definition of the Register structs +//! for use within the Machine module. +use crate::simulator::machine::{NUM_FP_REGS, NUM_INT_REGS}; use std::ops::{Add, Sub}; pub trait RegisterNum: Add + Sub + PartialEq + Copy {} @@ -16,7 +20,6 @@ pub struct Register { } impl Register { - /// Returns the current value held in register *position* pub fn get_reg(&self, position: u8) -> U { self.register[position as usize] @@ -29,28 +32,22 @@ impl Register { pub fn set_reg(&mut self, position: u8, value: U) { if position != 0 { self.register[position as usize] = value; } } - - } impl Register { - /// i64 register constructor pub fn init() -> Register { Register { register: [0i64; NUM_INT_REGS] } } - } impl Register { - /// f32 register constructor pub fn init() -> Register { Register { register: [0f32; NUM_FP_REGS] } } - } \ No newline at end of file